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Cadence, SMIC to address wireless design challenges in China

Posted: 14 Nov 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Cadence? SMIC? RFIC? process-design kit? PDK?

Cadence Design Systems Inc. and Semiconductor Manufacturing International Corp. (SMIC) will partner to deliver RFIC methodology workshops and provide RF kit applicability consulting to RF designers in China. The collaboration aims to provide designers the necessary tools for shorter, more predictable design cycles by ensuring that silicon performance matches design intent.

"There are many techniques peculiar to wireless," said Paul Ouyang, vice president of design services at SMIC. "A design kit with recommendations on methodologies and tools is a benefit to our customers. Our collaboration with Cadence on RF design will help customers in China design and deliver high-quality RF devices."

In line with their partnership thrust, SMIC will develop process-design kits (PDKs) to support Cadence's RF Design Methodology Kit and will validate the PDKs in a test chip by this year's end. The PDKs will be available by this year's end.

"The combination of the Cadence advanced full-custom RF IC design technologies, RF Methodology Kit with SMIC's RF CMOS process technologies will offer the highest levels of quality and productivity enabling silicon success for our customers. We look forward to continuing our close partnership with Cadence to provide to our mutual customer a joint RF IC solution based on 130- and 90nm RF CMOS processes," Ouyang said.

The RF Methodology Kit includes an 802.11 b/g WLAN transceiver reference design, a full suite of block-, chip- and system-level testbenches, simulation setups, test plans and applicability training on the RF design and analysis methodologies. Moreover, the kit focuses on top-down RF IC design and full-chip verification and addresses behavioral modeling, circuit simulation, layout, parasitic extraction and resimulation, and inductor synthesis. It also allows for IC verification within a system context, leveraging system-level models and testbenches for use by designers in the IC environment.

"We are pleased to collaborate with SMIC on a key effort to help customers in the Chinese RF-design market improve the quality and productivity in the design of their RF devices," said Jan Willis, senior VP of Cadence's Industry Alliances. "We look forward to jointly engaging mutual customers through workshops and RF Applicability training in China throughout 2007."




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