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AMS requires new testing approach

Posted: 16 Nov 2006 ?? ?Print Version ?Bookmark and Share

Keywords:analog mixed-signal signoff? SoC verification? testing before tape-out? Sandipan Bhanot? Knowlent?

Bhanot: Using a rigorous and automated methodology, AMS sign-off can ve achieved if design teams welcome the latest testbench and simulation techonogies.

Digital designers sign off on their designs' timing performance using a mix of dynamic and static tools. They then hand off the design to manufacturing. In the SoC era, however, we have to ask whether this is all the verification needed to create a successful SoC design. Unfortunately, the answer is no.

That's because analog and mixed-signal (AMS) circuitry requires a significant verification effort at the electrical level, even though it's only a fraction of the total device count for an SoC. If we don't exhaustively perform AMS verification, we end up with multiple respins, trying to get the design right. As a result, the SoC gets to the target application latethe end product misses its optimal market window.

What needs to be done to achieve sign-off for the AMS content in an SoC before tape-out to manufacture? Verification is challenging enough for the current generation of AMS circuits, which have grown dramatically in speed, functions and transistor count. The challenge is even more difficult as various power modes are used in portable designs. The latest nanometer silicon technologies have poorer signal-to-noise performance and more variability in the analog transistors. While suited for small analog blocks, the current design and verification tools are severely strained by the requirements of these complex AMS circuits.

Unlike today's large digital designs, AMS designers build and test their own circuits before handing them off for integration with the rest of the SoC. This traditional approach involves too much manual effort by the AMS designer. For the analog electrical block found in a high-speed serial interface such as PCIe, the specification for jitter behavior can be a hundred pages. Translating this into the right set of test measurement for a typical Spice simulator is a daunting task. Besides writing the correct tests, the designer needs to run them across all the process corners, voltages, temperatures and operating modes for the circuit. Typically, the tests are simulator- and design-specific, and are not portable to future projects or different design teams.

Given that the analog portion of the design is often the most risky in terms of success for the entire part and that the complexity challenge is growing, AMS designers need a new testing approach.

Exhaustive testing should be done before tape-out, and more AMS simulation must be automated to virtually eliminate manual methods. Analog testbench automation can help. For parts or circuits implementing industry-standard protocols or specifications, using an off-the-shelf analog testbench would significantly reduce the burden of test creation and give early feedback on how a circuit is meeting the design goals. Because testbench automation can be independent of any particular circuit and simulator, it allows reuse for the next project or by different design teams. To achieve timely simulation results, more Spice and fast-Spice licenses must be made available to design teams to eliminate the bottleneck in achieving exhaustive test coverage.

With a rigorous and automated methodology, AMS sign-off can be achieved if design teams say "yes" to using the latest testbench and simulation technologies, and move beyond traditional approaches. Now, the question becomes "How do we change the fundamental manual orientation of current AMS design and verification?"

- Sandipan Bhanot
President and CEO, Knowlent Corp.

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