Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Interface
?
?
Interface??

Rambus India achieves first silicon success

Posted: 21 Nov 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Rambus India? PHY? high-speed interface design?

Rambus Inc. announced it has released the first PHY high-speed interface design from its Bangalore India Design Center.

According to the press release, the design is optimized for TSMC's 90nm process node and fully functional in silicon with all necessary tests checked at its maximum data rate of 2.5GHz. The silicon sample meets characterization across voltage and temperature ranges in compliance with the PCI-SIG specification.

"Mixed-signal designs continue to present one of the most challenging design environments and this accomplishment of first-pass silicon success underscores the India team's competencies in this area," said Prakash Bare, managing director at Rambus India. "The Rambus Bangalore team has established itself as a provider of first-class engineering solutions that include design and verification, as well as chip tape-out, bring-up, and characterization."

The Rambus Bangalore Design Center was established in March 2005 to serve the company's growing customer base in Asia and to strengthen the its global presence. The facility implements technically-advanced designs of high-speed interface cells and cores designed for multiple process technologies. The India engineering team focuses on the development of PHYs and digital cores based on Rambus' technologies, including work in the areas of industry-standard designs such as PCI Express, Serial ATA and DDR2 memory interfaces.




Article Comments - Rambus India achieves first silicon ...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top