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Peripherals controller IC revs phone-to-PC downloads

Posted: 28 Nov 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Cypress? Antioch? West Bridge? USB? Simultaneous Link to Independent Multimedia?

Seeking to reshape the mobile market, Cypress Semiconductor Corp. is pushing for a new peripherals concept!or even a standard architecture!for feature-rich and other handhelds. As part of that effort, Cypress will roll out a dedicated peripherals controller that promises to download files from a handset to a PC faster than solutions from competing companies.

The controller, dubbed the West Bridge Antioch, is said to boost the transfer rates for complex data and media files from a handset to a PC via a USB link at speeds up to 480Mbps. Antioch is said to download 100 MP3 files in less than 5mins, compared with more than an hour for rival parts.

Based on what Cypress calls its Simultaneous Link to Independent Multimedia architecture, Antioch offloads many of the data and memory transfer functions from the host or application processor in a system at maximum efficiency!without disturbing any of the functions within the system itself.

At present, many feature-rich cellphones consist of discrete peripheral controller and USB functions in a system. In contrast, Cypress' Antioch part integrates many of the peripheral controller functions!such as USB, mass storage, memory interface and others!on the same chip for handsets and other handhelds.

PC-like architecture
This kind of integration is seen in today's PC-based chipsets. With Antioch, Cypress hopes to bring the PC-based standard chipset architecture into the cellphone space!at least on the peripherals side of the equation, said Alakesh Chetia, business director for Cypress' West Bridge business unit. "We're trying to bring a new architectural concept in the cellphone world," Chetia said.

For now, it is unclear!or even unlikely!that Cypress can drive a new standard architecture in cellphones, analysts said. Much of the standardization, of course, depends on multiple factors, including the adoption rate of key OEMs, they added.

Cypress declined to comment on its customers, but the chipmaker said it equates Antioch to the separate north bridge and south bridge of a PC chipset. There, the microprocessor works in conjunction with a chipset or core logic device. Typically, the chipset has two components!the north bridge and south bridge!that handle memory interface and peripheral functions, respectively.

Antioch, in effect, combines many of the same functions of a traditional north/south bridge chipset, but this time it's for a cellphone, said Alan Brown, an analyst with Gartner Dataquest.

"This innovation claims significant improvement in speeding up memory transfers to and from phone peripherals," he said. "It is comparable to the north and south bridge in the PC, releasing some of the power of the phone CPU for other tasks. Its benefits will be welcomed by most media phone users, provided the price penalty is not too high."

Brown said the device has other key benefits, but he stopped short of saying it would redefine or revolutionize the cellphone architecture. "If it is adopted as a standard, then it will allow rapid file transfer and features in many media-capable phones," he said. "It saves waiting time in transferring data, including music and movies and other media files. It will allow the phone to remain online during direct transfer to a memory card from the PC. This, of course, can be done already, but it improves the consumer experience."

Only for peripherals
The device has some tradeoffs as well. "It is an enhancement," said Brown, calling it an additional component that improves memory management. "It only affects the peripherals," he said. "It does not affect the main phone design!such as the applications processor or baseband processor!to a great extent. It will not give any significant improvement in the performance of the phone during normal connection to the network."

Cypress said the device can also be used in MP3 players, PDAs and digital cameras.

The chip replaces up to four distinct discrete components in a handset, lowering the cost for OEMs, said Herve Letourneur, product-marketing manager for Cypress.

The Antioch chip is a low-power, 1.8V device, with selectable clock frequencies rated at 19.2-, 24-, 26- and 48MHz.

The device consists of several components on the same chip: 8051 controller, high-speed USB, mass-storage interface and memory-map interface, among others. The 8051 controller handles the basic transaction management functions, while the USB part supports the 2.0 specification at 480Mbps. The mass-storage port can be configured to support a number of standards: SDIO, MMC, MMC+ and CE-ATA for HDD and NAND.

Communication with the external processor is realized through a dedicated processor interface. Asynchronous access times can reach a bandwidth of up to 66.7Mbps. Synchronous access times can be performed at 33MHz for up to a 66.7Mbps bandwidth.

Housed in a 6-by-6mm very fine-pitch BGA package, Antioch is priced under $4 in 500,000-unit quantities. The device is sampling now, with production slated for Q1 2007.

- Mark LaPedus
EE Times




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