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Cadence releases Virtuoso platform upgrade

Posted: 01 Dec 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Cadence Design Systems? Virtuoso V6.1? Virtuoso? OpenAccess? Anthony Gadient?

Cadence Design Systems recently released an upgraded version of its Virtuoso custom design platformthe Virtuoso V6.1. The platform implements constraint-driven design methodology and provides tighter integration within the design process for custom design. It also supports OpenAccess, an emerging industry database standard.

"With this new release, Cadence is laying a platform for the next ten years of custom design," Anthony Gadient, product marketing group director, Virtuoso Custom Design Platform shared in an exclusive interaction with EE Times India.

Virtuoso addresses custom digital, analog, RF and RF/microwave; it serves designers of microprocessors, memories, LCDs, sensors and standard cell libraries. The fast-growing end-use markets for these include CE, wireless communications and automotive electronics.

Virtuoso's support for OpenAccess is primarily aimed at addressing designers' interoperability problems. "In future, we will exclusively be supporting the OpenAccess database, which is a sign of Cadence's commitment to customer's interoperability problems," said Gadient.

This will also enable designers using Virtuoso to use a single technology file for storing process information. "This reduces the customer's costs of ownership, as they will no longer have to develop multiple technology files." shared Gadient.

Critical design issues
Cadence sees this platform addressing critical design concerns, as custom designs move to finer geometry nodesone, the ability to address yield issues upfront in the design process, to respond to the time-to-volume concerns of designers; and two, the support for alternate physical design implementation approaches, such as SoC and system-in-package (SiP), as customers seek to build high volumes to address non-recurring engineering and manufacturing costs.

The Virtuoso platform features automated constraint-driven methodology that supports DFM. This constraint system allows the front-end designer to precisely capture the design intent, and communicate that information to the implementation engineer. Circuit designers can specify constraints in the system that the layout designer can gain access to during physical layout and the system tracks which constraints are being met.

"The constraint system basically unifies different design data types, tools and methodologies, so that you can have a clear communication of the design intent from the designer to the layout engineer. This is to ensure that the physical implementation process does not introduce any element that would adversely impact overall system performance," noted Gadient.

"The designer can specify things like matching constraints and symmetry that basically define how differential circuits need to be laid out. These constraints get set, and during the later stage of design, the system guarantees that the constraint is met, unless the layout engineer specifically goes in and turns it off for some reason," he explained.

Integrated front-back flow
Another new feature of the new platform is integrated front-back flow, with a single user interface for a common look and feel across the custom design process. "Increasingly, circuit designers are having to spend time working at the layout, and they use some of the automated capability that we provide to do a prototype layout to get good estimates of parasitic information back into the design process. By having this unified front to back flow, it is easy for the physical information to be brought up earlier into the design stream," Gadient shared.

Like with its other product lines, Cadence has a three-tiered product segmentation approach for Virtuoso. The L level features basic design creation and implementation technology, with added capability to improve designer productivity. Virtuoso XL additionally features constraint-driven design methodology, and advanced analysis capability. The GXL offers a higher level of automated capability to address design for yield, parametric yield optimization, and the ability to optimize layout for manufacturability.

SiP implementation support
Cadence is strengthening linkages with its package design partners to support the SiP physical implementation methodology. "As customers move to finer feature nodes, some of them pick alternative implementation approaches. SiP is becoming a significant design challenge for our customers," said Gadient.

It is also working closely leading foundries such as TSMC, UMC and others to ensure the ready availability of process design kits that capture the details required in custom design, for the manufacturing process.

Cadence's kits initiative will also be impacted by the new Virtuoso platform. All the kits that Cadence will develop in future will take advantage of the new platform. "We will be releasing a new EMF design kit that takes advantage of these capabilities later this year," indicated Gadient.

With the release of the new Virtuoso platform, Cadence expects to maintain its overall sales revenue growth at a rate above market growth rate. "We expect to provide additional value towards the customers, and as our customers' requirements grow, it would enable us to achieve higher than market growth rate," added Gadient.

- Krishnan Sivaramakrishnan
EE Times India

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