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Design an M-LVDS clock distribution network

Posted: 18 Dec 2006 ?? ?Print Version ?Bookmark and Share

Keywords:AdvancedTCA-compliant M-LVDS clock distribution network design? clock distribution network design? LVDS design? Davor Glisic? National Semiconductor?

Short, narrow stubs coupled with signal drivers that have controlled output edge-rates are the key to increased noise margin and improved overall performance of any multipoint network. By keeping this in mind and following PCB design recommendations, reliable clock distribution networks can be designed with ease.

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