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ARM9-based MCU from Atmel delivers 200MIPS

Posted: 19 Dec 2006 ?? ?Print Version ?Bookmark and Share

Keywords:microcontrollers? MCU? Atmel? SAM9? ARM9?

Atmel's AT91SAM9263 MCU

Atmel Corp. has announced the latest member of its SAM9 familythe AT91SAM9263. The new device embeds a 200MIPS ARM926EJ-S-based MCU that overcomes bottlenecks occurring with conventional ARM9-based MCUs in graphically-interfaced, data-intensive applications such as networked medical monitoring equipment and GPS navigation systems.

The AT91SAM9263 employs 27 DMA channels including the company's 18-channel peripheral DMA controller (PDC), a 9-layer bus matrix, and two additional busses for data- and instruction-tightly-coupled-memories (TCMs) to boost CPU performance and provide on-chip data transfer rates of up to 41.6Gbps. Two external bus interfaces (EBIs) support gigabyte-plus external memories.

On-chip human interface peripherals include a camera interface, TFT/STN LCD controller, a 6-channel audio front-end interface (AC97), I?S and a 2D graphics co-processor that offloads line draw, block transfer, polygon fill and clipping functions from the CPU.

Peripherals
Networking peripherals include a 12Mbps USB host and device, a 10/100 Ethernet MAC and a 1Mbps CAN. There are also four USARTs, two 50Mbps SPI, CompactFlash, SDIO (MCI) and a two-wire interface (TWI), which can be connected to external wired and wireless communication modules like GPRS modem and Wi-Fi.

Conventional ARM9-based processors use load/store instructions that require at least 80 CPU cycles to transfer a single byte of data between memory and a peripheral. Running at 200MHz with a bus frequency of 100MHz, these processors typically reach the limit of their capability at about 20Mbps even with the memory management unit and instruction- and data-cache controllers enabled.

The AT91SAM9263 has two EBIs: one for the system memory and one for the human interface. The second EBI eliminates the need for the LCD controller and CPU to share memory and can increase available CPU MIPS by 20 percent to 40 percent.

20Mbps data rate
Atmel's AT91SAM9263 integrates 18 simple, silicon-efficient, single-cycle PDC, five DMA controllers with burst mode support to the USB host, Ethernet MAC, camera interface, LCD controller and 2D graphics controller, plus a memory-to-memory DMA controller with burst mode, scatter-gather and linked lists support. The DMA controllers completely offload the execution of data transfers between external serial interfaces and memories. At a 20Mbps data rate, SAM9263 still has 88 percent of its MIPS available for application execution.

Atmel has implemented 11 busses and 96Kbyte of on-chip scratchpad SRAM on the AT92SAM9263. The SRAM can be partly configured as data and instruction TCM. The busses provide multiple parallel on-chip data transfer channels and a total on-chip bandwidth of 41.6Gbps.

The AT91SAM9263 is available now in a 324-ball BGA package and is priced at sub-$10 for 100,000 parts.




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