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eInfochips verification component supports Mentor's Questa

Posted: 20 Dec 2006 ?? ?Print Version ?Bookmark and Share

Keywords:verification tools? verification tool? Mentor Graphics? eInfochips? SystemVerilog?

A component that provides building blocks for efficient design-under-test in module and system-level verification for Mentor Graphics' Questa Vanguard program, including assertion testing, is now available from eInfochips Inc.

In announcing the AMBA AHB verification component, eInfochips said it will provide verification IP options to build a comprehensive SystemVerilog community for Questa advanced verification platform users. The verification component can be configured as host, device or monitor. It allows module and system-level verification and a comprehensive list of assertions. Deliverables include verified verification component code, user guide, release notes and test suite.

Using AMBA AHB VC will reduce the cost and time-to-verify for complex systems-on-chip, said Tapan Joshi, vice president of marketing for eInfochips, a design and verification services company. "Our object-oriented verification methodology supports scalability and reusability in verification components, enabling their use across different modules and projects," he said.

Dennis Brophy, director of strategic business development in the design verification and test division of Mentor Graphics Corp., said the Questa Vanguard Program "offers enhanced verification options for Questa users and helps build a comprehensive SystemVerilog ecosystem."

"Through the Questa Vanguard Program," he said, "the AMBA AHB verification component provides an integrated development environment, enabling customers to work with assertions, coverage and edit code and view waveforms, all in a single window, resulting in reduced time-to-debug."

- K.C. Krishnadas
EE Times

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