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Synopsys, UMC enhance 90nm ref flow

Posted: 11 Jan 2007 ?? ?Print Version ?Bookmark and Share

Keywords:90nm? reference flow? design flow? Galaxy platform? Synopsys?

Synopsys Inc. and United Microelectronics Corp. (UMC) announced that they have collaborated to add new capabilities to the reference design flow based on Synopsys' Galaxy design platform for UMC's 90nm process.

According to the press release, the advanced low-power design flow, initially introduced in November 2005, now includes an automated multiple voltage capability that can reduce dynamic power and leakage power dissipation significantly. New design-for-test capabilities have also been added to the flow, and existing design for manufacturing capabilities were validated with UMC's libraries. These additions help IC companies reduce risk and achieve predictable success for complex low-power designs.

In addition, to validate the effectiveness of the reference flow, design consultants from Synopsys' professional services collaborated with UMC engineers to design a test chip with an open source 32bit RISC microprocessor core. The test chip, which was validated with UMC's library, was partitioned into multiple voltage regions and implemented using the advanced low-power reference flow.

"Our successful partnership with Synopsys gives our customers access to a validated 90nm reference flow that reduces risk and speeds time to market," said Ken Liou, director of the IP and design support division at UMC. "Our continued collaboration with Synopsys Professional Services ensures that the performance and capabilities of the Galaxy Design Platform will work smoothly in UMC's most advanced process flows."

"This collaboration helps ensure that Synopsys' Galaxy Design Platform offers UMC customers a complete, reliable RTL-to-GDSII design flow. We will continue to work with UMC to address future challenges as we move to even deeper submicron processes," said Rich Goldman, vice president of strategic market development at Synopsys.

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