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Novocell nonvolatile memory IP in 0.18?m CMOS

Posted: 15 Jan 2007 ?? ?Print Version ?Bookmark and Share

Keywords:CMOS? memory IP? memory devices? memory chips? memory IC?

Novocell Semiconductor Inc. announced its NovoBlox OTP memory IP, implemented in a patented, gate oxide antifuse technology. It yields a non-volatile memory block. The memory IP has been silicon validated in Jazz Semiconductor's CA18HR 0.18?m process.

NovoBlox OTP Memory, a nonvolatile memory IP, can be embedded in standard Logic CMOS without additional process steps and also includes a unique, highly reliable bit cell. NovoBlox is available in two architectures, ROM and Serial. A typical NovoBlox license is $60,000 plus per unit royalty.

The NovoBlox SmartBit cell generates and confines the breakdown voltage entirely in the memory cell. NovoBlox can be programmed at the wafer or circuit level or in the package, while some competitive memory blocks can only be programmed at the wafer level. Active detection of hard breakdown guarantees 100 percent programmability and data retention.

NovoBlox test devices were subjected to a 1000 hour High Temperature Retention Bake at 150C and a 1,000hr high temperature operating life test at 150C with zero failures at Jazz Semiconductor. Programming yield was 100 percent.

- Marty Gold

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