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QFN packaging guidelines for RF designers

Posted: 16 Jan 2007 ?? ?Print Version ?Bookmark and Share

Keywords:802.11n? chip packaging? BGA packaging? IC packaging? QFN packaging?

By Duane Benson
Screaming Circuits

Of all of the challenges facing wireless designers today, one of the least glamorous but important relates to component packaging. It seems such an irrelevant detail, but the component package is a strong determinant factor over layout flexibility. Layout, of course, can make the difference between a great product, a product with questionable reliability and something that just doesn't workall with the same basic circuit design.

Mobile device designers see anything small as positive. On the other hand, many industrial device designers, unaccustomed to real-estate restrictions, see small as a disadvantage. The QFN (quad flat pack, no leads) along with the micro-BGA (ball grid array) seem to be the package of choice for new RF and control devices.

With many of these new parts, the opinion of the designer is moot. Small is the only option. Despite the difficulties involved in moving down to parts with .5mm lead pitch that can't be hand assembled for the prototype, there are a number of advantages relating to ground path and thermal management.

Like it or not, designers using the new RF standards, such as 802.15.4 and the upcoming 802.11n will have to learn how to effectively utilize these small packages.

ZigBee example
Take a scenario that involves adding wireless into the redesign of a distributed process monitor and control system. The design pairs a Texas Instruments MSP430F1232 microcontroller (MCU) and a Freescale MC13192 based ZigBee radio into each remote device for more computing power, lower power consumption and wireless communications capability.

The MCU is available in several packages, including a QFN-32 but the radio part only comes in a 5-by-5mm QFN-32 package. A PG2012TK L-band GaAs FET switch is also required and that part only comes in a 1.1-by-1.5mm leadless minimold package.

The big volumes today are in the mobile world so chip companies are catering to that market first by introducing products in increasingly smaller packages and in many cases, never releasing in larger form factors. By using such small parts, the MCU and radio were placed very close to each other and both were placed at an optimum distance from the antenna.

Most QFN packages have an exposed metal pad covering most of the underside of the component. Generally, the metal pad is used for grounding and heat management. This puts the ground plane within as little as a millimeter away from the power connection as well as all signal pads.

The silicon is directly bonded to that center metal pad which greatly helps to conduct heat away. Even if the size advantage isn't important, the ability to locate capacitors so close to the signals, exercise control over the physical distance of the part from the antenna and so effectively draw heat away from the chip die gives the QFN package a distinct appeal in high-speed and RF designs.

QFN float
At a recent trade show, I received a sample part in a 3-by-3mm QFN package. While I haven't tried it yet, I'm pretty sure that, like a water bug, the part is light enough to float on a water surface because it doesn't have enough weight to break the surface tension. But, that's not what I'm talking about.

Like many high-speed QFN packaged devices, the middle of the part has an exposed metal contact pad covering most of the underside. The float that I'm talking about happens when there is too much solder paste on the PCB for that center pad. Like the water bug, the QFN doesn't have enough mass to sink down to the board.

On any surface mount device, to a small extent, the height of the solder paste deposit is proportional to the aperture in the solder stencil opening (bigger opening = taller deposit). With most parts, that isn't a problem because either all of the pads are big enough so that that ratio doesn't have a first order impact, or because all of the pads are the same size and will be equally impacted.

Since the QFN center pad is a much larger opening in the stencil than the signal pad openings, and the signal pad openings are in the 10-20 mil or less range, this deposit height-to-width ratio will have a first order impact.

When the opening for the center pad on the QFN is too large, the solder paste deposit in the center may be taller than the deposits on the small signal pin pads. The part high-centers and never gets the opportunity to contact the signal pads. In some cases, the part will tilt a little sideways and contact some of the signal pads but not all.

Figure 1: Difference between a QFM package that is floating up due to excessive solder in the center pad area and a second QFN that is properly assembled.

Solder paste stencil
Typically, the signal pads should have a standoff height of 2 to 3 mils after assembly. If too much solder is deposited in the center, the part can very easily float up beyond that height and prevent the signal contacts from connecting. To help prevent this, the solder stencil opening should be broken into a series of smaller openings and should cover between 50 percent and 75 percent of the pad area.

This means that when you lay out your pcb, you need to look carefully at the solder paste layer for your QFN components. If the solder paste layer in the CAD package part library just follows the copper pad pattern or the solder mask opening, you may need to customize the CAD package part library to avoid leading yourself into trouble.

To better illustrate the proper way to make your solder paste stencil for QFN parts, I went to our back room and took a couple of photos of good and bad solder paste stencil practices.

Figure 1: A worst-case stencil opening (top) with recommended practice of segmenting the opening (bottom).

Figure 2, top half, illustrates what a just about worst-case stencil would look like. Actual size for the part is 7-by-7mm. Note how much surface area that the center pad has compared to the row of side cutouts. With most SMT components, it is standard procedure to reduce the size of the paste cutout area in the stencil. In a case like this, it is difficult to reduce it enough and still get even paste distribution. The proper option is to segment to solder stencil are as shown in the bottom half of Figure 2.

If you just reduce the paste opening aperture, providing one smaller opening, but don't segment it, you may end up with a part that is still too high in the middle to assure good contact on the signal pads and is also unstable and will likely tilt to one side. With leaded solder, a single 50 percent sized opening may work because of the wicking properties of lead-based solder. Since lead-free solder does not wick as well, it is very unlikely to work in a RoHS process. In both cases, the most consistently reliable method is to segment the stencil pattern.

The recommended practice is to segment the solder paste opening in the center of the QFN. The basic idea is that you distribute a lower quantity of solder over a broader area. You reduce your chances of high-centering and other problems associated with large paste areas, such as out gassing and spattering.

This will give good solder distribution with little chance of high-centering or outgassing problems. When you reduce or segment the solder paste stencil pattern, do not do the same with the solder mask. Assembly works best with an even distribution of solder. Masking part of the pad area will work against good even paste distribution.

Specialized copper pad
Some parts, especially high-frequency parts, such as the MC13192 ZigBee part, require a segmented copper pad under the QFN. If this is the case, it is important to segment the solder paste stencil to match the custom pad. It is fairly common practice to use a standard full-size square opening and assume that surface tension will end up distributing the solder in the right places. For best reliability and buildability, make sure that the openings match your copper layer underneath the stencil openings. Be sure that your stencil openings only fall above the copper and not over any solder-mask or bare-board sections.

The first run of the design described above properly used a segmented copper layer, but had a full-size opening for the stencil. Sure enough, that wide opening allowed too much solder on the copper. The problem was further exacerbated when the solder migrated off of the bare board areas and on to the copper pad segments. Fixing the stencil fixed the problem.

Larger opposites
With larger QFN parts, the opposite problem can occur in the center pad area. When the square opening for the solder paste stencil is fully open on a larger partsay 10-by-10mm or larger the paste squeegee may deform and actually scoop too much of the paste out of the opening.

This can lead to uneven paste and solder voids. Both are potential reliability problems. The solution is the same. Segment the stencil opening to create an even paste distribution.

Conclusion
The QFN form factor delivers a number of advantages over other SMT package form factors. It is generally a smaller part and, with the center pad, can have better grounding and thermal properties.

These advantages are partially offset by layout and assembly difficulties. By following a few simple guidelines, you can use the parts with confidence. Check the layout guidelines in the component applications notes.

Segment your solder stencil opening for the center pad. Make a custom component library for your CAD package if you need to. Then design away.

About the author
Duane Benson
is a marketing manager at Screaming Circuits. He started his career in the early-eighties designing with the Z80, CDP1802 and 8088 and moved to product marketing in 1989 as the first product manager for In Focus Systems. Duane can be reached at dbenson@screamingcircuits.com.




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