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PMC/XMC module features ruggedized design

Posted: 19 Jan 2007 ?? ?Print Version ?Bookmark and Share

Keywords:PMC/XMC? ADC? DDR memory? Pentek? FGPA?

Model 7141-703 PMC/XMC module from Pentek

Pentek Inc. has rolled out Model 7141-703 PMC/XMC module featuring two 14bit, 125MHz ADCs and a Xilinx Virtex-II Pro FPGA. The solution is configured as a ruggedized module fully compliant with the ANSI/VITA 20 conduction-cooling specification and ANSI/VITA 42 XMC specification. This module is compatible with both cPCI and VME baseboards.

In developing the 7141-703 PMC/XMC module, Pentek integrated extended temperature-range components within a thermally efficient housing to ensure effective heat transfer to the carrier board. The module has an extended operating temperature range of -40C to 70C. Because of its high-speed capability and ruggedized construction, the 7141-703 is well suited for designs in a variety of market sectors where there is a need for wideband software radio resources in harsh environments. These include a significant range of military and aerospace applications such as unmanned aerial vehicles, battleground SIGINT and communications systems, deployment on tanks or torpedoes, or any system in which ambient or forced air will not provide adequate cooling.

Module resources
Two full-scale, -10dBm analog HF or IF inputs are delivered through front-panel SSMCX connectors. Signals are transformer-coupled to two LTC2255, 14bit ADCs running at 125MHz. The digitized output signals pass to a Virtex-II Pro FPGA for signal processing or routing to other module resources. These resources include a quad digital down-converter, a digital up-converter with dual 16bit 500MHz D/A converters, 512Mbyte DDR SDRAM delay memory and the PCI bus. The FPGA also serves as a control and status engine with data and programming interfaces to each of the on-board resources. Factory-installed FPGA functions include data multiplexing, channel selection, data packing, gating, triggering and SDRAM memory control.

Two independent internal timing buses can provide either a single clock or two different clock rates for the input and output signals. Each 7141-703 can act as either a timing bus slave, receiving timing signals or as a master driving up to seven boards, supporting synchronous sampling and sync functions across all connected boards. Up to 80 boards may be synchronized with a Model 9190 clock and sync generator.

Model 7141-703 complies with the VITA 42 XMC specification. The XMC interface supports high-speed switched-fabric interconnects such as Serial Rapid IO and PCIe. There are two 4x serial ports. Each is a 3.125GHz bidirectional link interconnecting the module with the carrier board and providing 2.5GBps full duplex operation, thereby supporting very high bandwidth interchanges.

Custom algorithms
The 7141-703 benefits from all of Pentek's GateFlow FPGA resources. The GateFlow FPGA Design Kit provides designers with VHDL source code and device configuration for basic factory-installed functions to facilitate the addition of custom algorithms. The developer is able to incorporate proprietary IP with the IP that is shipped with the board, so that together they become the functionality of the entire 7141-703 board. Also available are Pentek's GateFlow IP Cores, including wideband and multichannel digital receivers as well as FFT and pulse-compression algorithms.

Pentek's ReadyFlow Board Support Libraries of C-callable device functions for the processor platform are available for all I/O modules. Board operation and setup is simplified through easy-to-use function calls while still providing the flexibility and power of low-level access to all of the board's hardware. Pentek support libraries, device drivers and software development tools, plus third-party offerings, are all available for a variety of platforms, including PCs running Windows 2000/XP or Linux and PowerPCs running VxWorks, Linux or eCos OS.

Model 7141-703 PMC/XMC module's price start at $15,995, with first delivery eight to 10 weeks ARO.

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