Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Manufacturing/Packaging

Startup weaves new foundation for chip design

Posted: 01 Feb 2007 ?? ?Print Version ?Bookmark and Share

Keywords:Fabrrix? PDF Solitions? chip? logic bricks? 65nm?

Pileggi: Laying foundation with 'logic bricks.'

Startup Fabbrix Inc. wants nothing less than to weave a new foundation for chip design. At 65nm and below, the company says, manufacturable designs require regular circuit patterns or "fabrics"and Fabbrix says it can provide that without area, performance or power penalties.

Fabbrix in December announced its collaboration with PDF Solutions Inc., which will result in a joint development project around silicon characterization. The project will help Fabbrix develop and optimize the circuit fabrics that underlie its approach.

Fabbrix proposes to transform chip design with libraries of "logic bricks" that contain regular structures built from lithography-friendly shapes. The approach, Fabbrix claims, avoids the area and performance penalties of restricted design rules (RDRs) while providing many of the same manufacturability benefits. Fabbrix says its new technology can improve yields, simplify design flows, reduce transistor variability and make resolution enhancement technology more effective.

Fabbrix was founded in 2004 by Larry Pileggi, professor of electrical and computer engineering at Carnegie Mellon University, and some of his graduate students.

"We recognized that the world was moving toward more regular design structures by necessity, and we had been doing research at Carnegie Mellon for five or six years," said Pileggi. "We were looking at the changes in design methodology that would be needed if things went to very regular structures."

According to Pileggi, Fabbrix is working with several IDMs, has designed an embedded processor and has taped out several other blocks to test its technology against traditional standard-cell implementations. The initial work has been at 65nm and 45nm, he said, although the company has done some early experimentation with 32nm.

No performance trade-offs
Previous approaches to regular, structured IC design have come with area and performance trade-offs. FPGAs are a notable example. But that's not the case with Fabbrix's logic bricks, according to Pileggi. "We found that at 65nm, we can easily meet or exceed area and performance vs. standard cells," Pileggi said. "Power can be substantially better in terms of leakage, and regular structures provide much better control over line-width variations."

Marcin Strojwas, director of business development at PDF Solutions, noted that chip designers are feeling the pinch of increasingly restricted design rules as they move to 65nm and below. In the past, Strojwas said, moving to the next lower process node would usually provide a 40 percent area gain, but now it's closer to 25 percent.

"I think the strength of the Fabbrix solution is that they have a way to actually recover the area benefit of migrating to a more advanced technology node, while also delivering superior manufacturing ability and yield," he said.

Strojwas believes the Fabbrix approach can potentially replace conventional standard-cell design, provided there's customer adoption.

Pileggi noted that the challenges of "subwavelength" ICs are a strong driver for regularity.

"We're still trying to print patterns that are much smaller than the wavelengths of light of steppers," Pileggi said. "When you do that, the more irregular you try to make patterns, the more difficult it is for lithography. Things won't work at all, or if they do work, you have quite a bit of variability."

The problem with RDRs, Pileggi said, is that "you surrender something in terms of area or performance in doing that. But what we found is that at 65nm, you can actually build in a regular way that's superior to a non-regular way."

Promising approach
Like RDRs, the Fabbrix approach holds promise for simplifying DFM concerns. "We believe that Fabbrix redefines DFM," Pileggi said. "Instead of bringing what is possible to design into manufacturing, we are bringing what is manufacturable into design."

Fabbrix's solutions start by defining regular design fabrics, or 3D seas-of-shapes that define possible circuit patterns for each mask layer. It provides the underlying patterns into which all logic is mapped. The design fabric definition minimizes variations in electrical parameters, including transistor leakage.

Logic bricks, which can be thought of as extremely large standard cells, are the building blocks of Fabbrix-based chips. "You know how this brick will print in silicon, because all the patterning is known a priori," Pileggi said. He noted that logic bricks range from five to 12 input functions and might have 10 to 30 transistors. They have fixed layouts and are not configurable.

Compared with traditional standard cells, logic bricks are said to have a higher logical density and more regularity, simplifying placement and routing and reducing power, area and parasitics. A complete brick library may contain fewer than 30 unique logic bricks, allowing intensive analysis and optimization for each one. Brick libraries can be created for specific applications, such as low-power microprocessors.

One important point, Pileggi said, is that Fabbrix builds the bricks to be compatible with the memory that's going to be in the chip. While bricks have fixed layouts, they're adjustable, he said. "The fabric is a very regular gridded structure, so it's really easy to adjust the patterns," he said.

Fabbrix will provide design tools to derive and build the logic bricks. Otherwise, Pileggi said, everything can be implemented with commercial design flows.

He noted, however, that foundries will have to define the underlying fabrics and work with Fabbrix collaboratively to develop blocks that work in the foundry's technology. Fabbrix has yet to announce any foundry partnerships.

Tools partner
The one partnership that Fabbrix has announced is the one with PDF Solutions, which provides tools and services for yield optimization and learning. "They've really been characterizing people's designs for a long time," said Pileggi. "They have all the silicon data and the technology infrastructure to understand what the patterning of a design should be. When we take the PDF technology infrastructure and add on Fabbrix methodology, I believe we can really produce designs that are superior to anything with a nonregular pattern."

Inertia and resistance to change may be Fabbrix's biggest challenge.

"I think the primary challenge is simply customer adoption," said Strojwas. "Getting this into customer flows is going to be the greatest challenge. From a technology perspective, the strength is there."

- Richard Goering
EE Times

Article Comments - Startup weaves new foundation for ch...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top