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Macro modeling offers temporal, spatial modeling

Posted: 09 Feb 2007 ?? ?Print Version ?Bookmark and Share

Keywords:macro modeling? SMMART? Sequence Design? CoolTime? CoolPower?

IC power specialist Sequence Design has rolled out new features for its CoolTime and CoolPower analysis and optimization tools, including what the company calls SMMART, or Sequence Macro Modeling using Advanced Region Technique. This algorithm claims to support advanced modeling of memories and other macros for dynamic voltage drop analysis.

According to the company, current transistor-based macro-modeling solutions often fail due to data size, prohibitive runtimes and memory footprint. SMMART claims to address these challenges with temporal and spatial modeling. To develop it, Sequence worked with customers to understand memory modeling issues at 65nm and below, according to Vic Kulkarni, Sequence president and CEO.

Meanwhile, CoolTime's concurrent voltage-aware timing analysis capability has been extended with voltage selection. Designers pushing performance limits can now reduce pessimism by a precise selection of instance voltages, according to the company. Claimed performance improvements include a 40 percent reduction in memory footprint and runtime for dynamic voltage drop analysis, and a 10-fold improvement in disk usage for dynamic voltage drop optimization.

CoolTime concurrently analyzes timing, signal integrity, static IR drop and electromigration. CoolPower, introduced June 2005, includes automated power, timing and signal integrity optimization features. Sequence released an enhanced version of CoolTime in April 2006.

- Richard Goering
eeProductCenter




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