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FPGAs feature ARM soft processor core

Posted: 22 Mar 2007 ?? ?Print Version ?Bookmark and Share

Keywords:processor? FPGA? ARM? Actel? Fusion?

Soft-core versions of ARM processors have been available in FPGAs for some time. Until now, however, none of these processors was originally conceived and designed with an FPGA implementation in mind. This situation just changed with the introduction of the Cortex-M1, which is the first ARM soft core to be designed from the ground-up for use in FPGAs.

The 3-stage pipeline Von Neumann Cortex-M1 processor with high-frequency, low-area design was especially designed for FPGA implementations. The device can execute all existing Thumb code from ARM7-, ARM9- and ARM11-based designs. Furthermore, the Cortex-M1 is upwards compatible with other members of the Cortex family. Based on the 16bit Thumb instruction set for code density, but with additional 32bit Thumb-2 system instructions, the Cortex-M1 instruction set has a lightweight Thumb-2 profile, making it a suitable C compiler target.

Especially for FPGAs
Designed from the ground up for use in FPGAs, Cortex-M1's RTL has been optimized for use in multiple FPGA fabrics and the device can be implemented on any FPGA device from Actel, Altera, Lattice Semiconductor, QuickLogic and Xilinx. Furthermore, the device has support from major FPGA synthesis vendors such as Mentor and Synplicity.

A key feature of the Cortex-M1 is its configurability, which allows it to use the least amount of FPGA fabric and resources necessary to satisfy the requirements of the target application. For example, debug capabilities (4x breakpoint and 2x watchpoints) can be included or removed; OS extensions for such things as system timers and software interrupts are optional; the designer can employ anywhere from 1 to 32 interrupts with four priority levels; the size of the instruction and data cache memories can be set to 0K, 1K, 2K, 4K? up to 1,024K; the user can select the multiplier unit to be fast or small; and the core can be set to work with big- or little-endian memory implementations.

FPGA-based Cortex-M1 implementations will be of interest for a wide variety of applications, including portable/consumer products; automotive applications; industrial control, robotics and medical applications; and telecom and military/aerospace applications.

Lead partner
The lead FPGA partner and the first licensee for the Cortex-M1 is Actel Corp., which has just announced that this core has been added to its soft core processor line-up (see figure). The Cortex-M1 has been optimized for use in Actel's M1 ProASIC3/E and M1 Fusion device families, in which it can operate at up to 72MHz and be implemented in as few as 4,300 tiles. In the case of a M1AFS600 Fusion mixed-signal FPGA with 600,000 system gates (13,824 tiles), for example, the Cortex-M1 consumes less than 30 percent of the device's digital logic resources. By comparison, in the case of a M1A3P1000 ProASIC3 low-cost digital FPGA with 1,000,000 system gates (24,576) tiles, the Cortex-M1 consumes less than 20 percent of the digital logic resources.

The Coretx-M1 joins Actel's line of soft processor cores.

Of particular interest to designers is the fact that the Cortex-M1 core is license- and royalty-free to Actel customers; all that is required is purchase of an M1 device. The Cortex-M1 core is available in Actel's graphical interface CoreConsole, which also includes a wide range of AMBA-based peripheral IP. Supporting the fast assembly and configuration of user designs, and providing seamless integration with Actel's comprehensive FPGA design and development software, Libero IDE, CoreConsole is available for free download from Actel's Website. Soft-core early access will be available Q2 2007; M1 device early access will be in Q3 2007; and M1 device product release will be in Q4 2007.

- Clive Maxfield
Programmable Logic DesignLine

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