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IC firms announce gate material breakthroughs

Posted: 02 Apr 2007 ?? ?Print Version ?Bookmark and Share

Keywords:high-k dielectrics? metal gates? Core microarchitecture? Penryn processors?

Three entities!IBM Corp., Intel Corp. and Sematech!have separately disclosed breakthroughs in the development of high-k dielectrics and metal gates for use in advanced gate stack applications in logic designs.

Intel Corp. has disclosed more details about its 45nm process, saying that it has implemented two materials!high-k dielectrics and metal gates!for the technology.

The company claims to be one of the "first" chipmakers to implement the new materials in transistor development. High-k dielectric films are expected to replace silicon dioxide (SiO2) for gate stack applications in logic designs at 45nm and finer process nodes. Metal gates are supposed to replace the polysilicon used in those applications.

Using an undisclosed thick hafnium-based material for its high-k films in gate-stack applications, Intel claims that it is able to boost overall performance while reducing transistor leakage by more than 10 times over current silicon dioxide technology.

The technology will help enable Intel's initial 45nm microprocessor designs, code-named Penryn. The yet-to-be-introduced line of processors is based on the company's Core microarchitecture. With over 400 million transistors for dual-core processors and more than 800 million for quad cores, the Penryn family is due out later this year.

Seeking to get a jump on its rivals, Intel last year originally disclosed the initial details of its 45nm process and claimed that it had produced the world's first chips based on the technology. Intel's 45nm process, dubbed P1266, is said to incorporate copper interconnects, low-k dielectrics, strained silicon and other features.

At the time, the company did not disclose whether it would deploy SiO2 or high-k dielectric films for the critical gate stack. Intel now says it will use a new material with high-k properties for the transistor gate dielectric and a new combination of metal materials for the transistor gate electrode.

High-k/metal gate transistors due in 45nm designs. Materials pave way for better performance and reduced leakage.

High-k materials have been widely used for the development of the capacitor structure in DRAMs, but the technology has been difficult to deploy in logic designs because of integration, materials and cost issues. So high-k and metal gates are seen as major breakthroughs in transistor technology for logic chips. SiO2 has been used to make the transistor gate dielectric for more than 40 years, but that material is expected to hit a wall in logic chip designs finer than the 45nm node.

Intel has shrunk the SiO2 gate dielectric on its 65nm process technology to a thickness of as little as 1.2nm!equal to five atomic layers. To move down the curve, Intel replaced SiO2 with a thicker hafnium-based high-k material in the gate dielectric to achieve the tenfold leakage reduction.

Intel did not disclose the exact material used for the film, but the company noted that it used atomic-layer deposition tools to deposit the technology one atomic layer at a time.

Among the possible candidates for high-k dielectrics are hafnium and zirconium silicates and their oxides, which have dielectric constant values ranging from 3.9 to 26. SiO2 has a dielectric constant of 3.9.

Because the high-k gate dielectric is not compatible with today's silicon gate electrode, the second critical ingredient in Intel's 45nm transistor materials recipe is the development of new metal gate materials.

"There are two layers in the metal gate," said Mark Bohr, a senior fellow at Intel: "one optimized for the NMOS and one for the PMOS."

Density boost
Overall, Intel's 45nm process technology is said to improve transistor density by approximately two times over the 65nm node. The combination of the high-k gate dielectric with the metal gate for Intel's 45nm process technology provides more than a 20 percent increase in drive current, or higher transistor performance.

Conversely, it is said to reduce source-to-drain leakage more than five times, thus improving the energy efficiency of the transistor.

In a separate announcement, IBM also tipped its high-k and metal gate development efforts. Working with Advanced Micro Devices, Sony and Toshiba, IBM claims to have found a way to construct a critical part of the transistor with a new material, clearing a path toward chip circuitry that is smaller, faster and more power-efficient than previously possible.

Like Intel, IBM did not disclose what type of hafnium-based material it will use for high-k. IBM did say it has inserted the technology into its semiconductor-manufacturing line in East Fishkill, New York. The chipmaker will apply the material to ICs with line widths as small as 45nm starting in 2008.

"Until now, the chip industry was facing a major roadblock in terms of how far we could push current technology," said T.C. Chen, VP of science and technology at IBM Research.

Not to be outdone, chip research consortium Sematech has demonstrated high-k/metal gate stacks that were used to build high-performance NMOS and PMOS transistors.

The PMOS and NMOS materials were integrated into highly scaled CMOS devices that showed low threshold voltage similar to conventional polysilicon devices. The materials had an equivalent oxide thickness in the range of 1- to 1.2nm, Sematech said.

The CMOS devices were fabricated with conventional gate-first, high-temperature processing flows used by chipmakers today, with no reduction to drive currents or other performance metrics. The demonstrated performance was achieved without using substrate counterdoping or other extraordinary or complicated measures, Sematech said.

- Mark LaPedus
EE Times




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