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32bit flash MCUs tout lowest power

Posted: 02 Apr 2007 ?? ?Print Version ?Bookmark and Share

Keywords:flash MCU? 32bit flash MCU? peripheral DMA controllers?

Atmel introduces the UC3 Series A, which the company claims to be the industry's lowest power family of 32bit flash MCUs. Based on the company's AVR32 UC3 core, the devices deliver 80 Dhrystone MIPS and consume 40mA at 66MHz when operating from +3.3VDC.

AVR32 UC3 core is the second core to be based on Atmel's AVR32 architecture launched last year. It has single cycle DSP instructions that include multipliers and multiply-and-accumulate, and executes 1.3 Dhrystone MIPS/MHz.

The UC3 Series A MCUs are designed with a six-layer high-speed bus matrix with point-to-point connections from all masters to all slaves, enabling masters to concurrently access any slave at a maximum speed of 264MBps at 66MHz. If multiple masters wish to access the same slave, arbitration is automatically performed.

High bandwidth
The devices feature a peripheral DMA controller designed to ensure up to 24MBps data transfer at 66MHz. The 15-channel peripheral DMA controller connects each peripheral directly to the entire addressable memory system. This approach was selected in order to enable high bandwidth data transfers without any processor overhead. In addition, the peripheral DMA on UC3 Series A MCUs provides 15 DMA channels with a total available bandwidth of 24MBps.

Configurable in full- or half-duplex modes, the UC3 Series A's Ethernet MAC has dedicated DMA, a programmable interpacket gap, support for virtual-LAN tagged frames and automatic-pause frame generation and termination. A dual mode interface offers a media independent interface (MII) with a large selection of PHYs for Fast Ethernet applications, or a reduced MII which uses less I/O.

On-the-go capability
The MCUs also incorporate a 12Mbps USB 2.0 device with on-the-go capability. Communications interfaces include two master/slave SPIs, one synchronous serial controller, one master/slave two-wire interface and four USARTs with hardware flow-control. One USART has special extensions to support modem, IrDA and smart-card ISO7816 serial protocols.

Additionally, the MCUs' on-chip system manager includes an internal voltage regulator for 3.3V single power supply operation, power-on reset, brown-out detector, hardware watchdog timer and a real-time timer. UC3 Series A consumes 40?A in sleep mode and 600?A/MHz in active mode.

Atmel provides the GNU gcc C compiler, GNU gdb debugger, real-time kernel and lwIP TCP/IP protocol stack for the UC3 Series A family, at no charge. An evaluation kit (EVK1100) is also available. Six UC3 Series A devices with flash densities of 128- to 512Kbyte are sampling now and will be available in volume production in 4Q 2007. They are priced as follows in quantities of 10,000: With external bus interface: 512Kbyte Flash ($8.16), 256KByte ($6.31), 128Kbyte ($5.47). Without EBI: 512Kbyte flash ($7.43), 256Kbyte ($5.61), 128Kbyte ($5.35).

- eeProductCenter

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