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Leverage multicore processors with graphical system design tools

Posted: 16 Apr 2007 ?? ?Print Version ?Bookmark and Share

Keywords:multicore processor design? software methodology? multicore processor design?

By Randy Martin
QNX Software Systems

A key step in tackling a multi-core design is developing a clear software design methodology. The methodology must take advantage of the performance and flexibility that multi-core processors offer, while also managing the complexity of programming for a multi-core processor. Two critical components of this methodology include:

1. Software tool flow - Used from concept to final design by starting with algorithm development, through software prototype and final deployment, software tool flow is a critical component due to the programming complexity involved in a multi-core design.

2. Real-Time Operating System (RTOS) - In addition to the thread handling and priority scheduling that an RTOS delivers on any platform, the RTOS also manages the hardware abstraction layer. The RTOS handles components such as inter-process communication mechanisms, shared-memory data infrastructure, and synchronization primitives.

Graphical system design offers many advantages for developing an embedded system for both single processor and multi-core designs. Projects can scale to multi-core while preserving the real-time behavior and data integrity of the. This is an important benefit to engineers who know that their projects will increase in complexity and require more performance in the future.

Using graphical design tools
When dealing with embedded systems, it is no secret that the lines of code quickly increase as the overall complexity of the application escalates. Furthermore, programming overhead is not aided by adding the management of two processors instead of only one.

A method to abstract the complexity of programming embedded systems, both in single processor and multi-core designs, is to choose a software tool flow based on a graphical approach. The advantage of this methodology is that many graphical-based tools, such as LabVIEW, include native functionality to handle complex programming and timing.

This means the embedded developer can focus on the critical pieces of code, for example, the intellectual property (IP) of the application itself to differentiate it from other embedded designs, rather than the low-level details.

As an example of how a graphical approach can abstract programming complexity, see Figure 1, below. This application uses two loop structures which contain a filter task and an Fast Fourier Transform (FFT) task running in parallel. Using LabVIEW loops in this manner divides an application into independent threads with user-defined priorities and execution rates. In a multi-core design, these threads are handed-off from LabVIEW to the OS which takes care of the load balancing between the two processors.

Figure 1: Timed loops in LabVIEW execute tasks in parallel.

Graphical system design is an approach that takes advantage of graphical programming in the context of embedded design. This approach consists of three main stages: design, prototype and deploy. The main concept is to leverage code re-use between stages, and in doing so, shorten the embedded design cycle.

The first stage is to design the primary IP of the application in the form of algorithms and functionality used to describe the system. There are various high-level views to design the IP.

For example, an engineer could describe control tasks using a model-based view, digital signal processing tasks using data flow, and mathematical formulas textually. LabVIEW accommodates these different views by including text-based math, continuous time simulation, state diagrams, and graphical dataflow models from within the same development environment.

Dr. Edward Lee, a leading researcher at the University of California at Berkeley for embedded software platforms, refers to these various design views as models of computation. These models of computation match the way system designers view their system to help minimize the complexity of translating system requirements into a software design. After the design is created, using whichever approach best solves the problem, the engineer can simulate the design in software before creating a hardware prototype.

The next stage in graphical system design is to prototype. In this case, the term prototype does not refer to an early iteration of the final custom embedded design. Rather, this stage refers to a functional yet experimental prototype.

The process consists of taking the code created in the design stage, and verifying that design in a real-world environment using commercial-off-the-shelf (COTS) processors and I/O modules. There are many advantages to prototyping with COTS hardware early in the design process:

  1. Instead of immediately laying out a custom printed circuit board and being forced to spend time iterating on the hardware design as the software evolves, an engineer can fully validate their software design before passing off to the hardware team. This allows an engineer to choose target hardware later in the design flow, based on cost and features, once the CPU requirements are known.

  2. An engineer can reprogram and reuse COTS prototyping hardware for future designs, not just the current design.

  3. For low volumes, it may make sense to actually deploy a system based on a rugged off-the-shelf prototype. Later, when economies of scale make it advantageous to produce the embedded system in volume, the engineer can deploy the design to custom hardware.

After prototyping, the final stage is to deploy. The graphical code used in the design and prototype stages are again reused, such that all the IP from the original proof-of-concept is algorithmically preserved, with the exception of integrating the application with the custom peripherals depending on the hardware layout.

Leveraging multicore performance
To add comprehensive support for multicore processors to an embedded design programmed with LabVIEW, engineers can use an RTOS, in this case, the QNX Neutrino.

With a multi-core enabled RTOS, an engineer can achieve symmetric multiprocessing, where the operating system can schedule activities on multiple cores at the same time and provide true parallel processing.

A developer who designs an application " called "virtual instruments" (VIs) in LabVIEW - with multiple simultaneous execution paths can instantly see increased computing power and shorter data processing times, without the need for any special coding or design techniques (see Figure 2 below).

Figure 2: Single core vs. Multi-core implementation.

When using QNX Neutrino, there is no additional work required for LabVIEW to take advantage of a multi-core processor, as the RTOS automatically manages this for the developer. Similarly, the process of code migration from a single processor to a multi-core design is greatly simplified by not requiring any LabVIEW code change.

An added benefit when developing with the LabVIEW Embedded Development Module for a Neutrino target system is that the system designer is not required to choose the target CPU until late in the project design.

The designer can complete the design and prototype stages without worrying about the target hardware. Then, after measuring the required CPU performance, the developer can choose a single core or multi-core target.

Notice that in Figure 2 above the LabVIEW VIs remain the same in both cases. To help optimize performance, graphical tools are provided by QNX to measure CPU load on single and multi-core target systems.

Trimborn, Mike. National Instruments. Graphical system design basics: Accelerating development time and bringing embedded design to the masses.
Multi-core board image courtesy of TechOnline. Intel Core Duo processor and Mobile Intel 945GM Express Chipset VirtuaLab.
Lee, Dr. Edward A. Advances in Computers (M. Zelkowitz, editor). Vol 56, Academic Press, London, 2002.
Craig and Leroux, QNX Software Systems. Leveraging multicore processors for high-performance embedded systems.

About the author
Randy Martin
is product marketing manager at QNX Software Systems.

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