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Stretch slashes IC cost by two-thirds

Posted: 01 May 2007 ?? ?Print Version ?Bookmark and Share

Keywords:WiMAX? H.264? processor? S6 processor?

Startup Stretch Inc. has revamped its management and architecture, slashing the cost of its reconfigurable processor by almost two-thirds while claiming a significant performance boost as it seeks design wins in broadcast, WiMAX and security systems. Stretch is one of a number of companies leveraging new concepts to attack markets traditionally served by DSPs.

Stretch claims its 300MHz S6 processor can handle encoding of four channels of main profile H.264 video in parallel, while a 500MHz Texas Instruments DaVinci DSP handles just one channel. The new chips cost as little as $25down from $65 for the company's first-generation parts, launched in 2005.

It's not clear how much traction Stretch had for those first-generation parts. The company has absorbed $73 million in venture financing since it was founded in 2002. It will take on at least one more round of funding before hitting break-even.

Two well-known executives from the FPGA world have replaced the startup's original founder and head of marketing. Craig Lytle, now chief executive of Stretch, was the VP of system engineering at Altera Corp. Bob Beachler, VP of marketing at Stretch, was Altera's director of strategic marketing and communications.

Stretch's new chips preserve the fundamental concepts and approach of its first-generation architecture while making numerous changes aimed at slashing die size and enhancing performance.

Several startups are attacking the DSP turf with novel concepts, many of them touting an ability to reconfigure hardware on the fly. Experts say Stretch has a unique approach among the contenders, although it faces the challenges common to all reconfigurable efforts.

"Their architecture is unique because they bring programmable logic right into the data path of the processor," said Jeff Bier, founder of Berkeley Design Technology Inc., a DSP analysis company. "It's a very powerful concept."

But two questions dog reconfigurable architectures of all types, Bier added. They typically carry baggage to provide reconfigurability, and they can be difficult to program.

"You lose silicon area and clock speed" with reconfigurable chips, said Bier. He noted that the new Stretch chips run at 300MHz, one-third the speed of today's top DSPs.

Highlighting 'hot spots'
Stretch claims that programmers of its processors can work in the C language. To get the best performance, however, programmers need to use 10 instructions that are not in the C standard in order to highlight "hot spots" in their code. Then the startup's tools will automatically optimize the code for best performance on the S6.

"I've seen too many claims like this that didn't pan out," said Bier.

Stretch made a handful of changes to its processor to bolster performance, including adding four hardware accelerators for specific functions needed to handle H.264 or WiMAX traffic. Programmers address the accelerators with function calls to an API.

Stretch slashes die size while boosting the performance of the S6 chip. The second generation uses fewer and wider programmable elements and new HW accelerators.

The chip now uses a dual-issue Tensilica Xtensa LX processor at 300MHz, instead of a single-issue version of the processor running at the same speed. A second Xtensa was added to implement the new hardware accelerators.

In addition, Stretch doubled internal RAM, to 64Kbytes, and upgraded its external memory interface to 667MHz DDR2 from 400MHz DDR.

To push the maximum processing speed of its programmable fabric to 200MHz, the company expanded the number of pipeline requesters from 1,000 to 35,000. Other optimizations helped it to push down the time for configuration switching from 130?s to 30?s.

Similarly, the company made several changes to shave cost by slashing die area while using the same 130nm Taiwan Semiconductor Manufacturing Co. Ltd process used for its first-generation parts. The most important of these was shifting its programmable fabric from 256 multipliers configured as 8 x 4 to 64 elements configured as 8 x 16.

The company also streamlined the chip's I/O design, stripping out dedicated interfaces to MIPS and PowerPC processors.

"We found that few users were hooking these chips up to a PowerPC or MIPS chip; they were using them in a standalone mode," said Beachler.

Stretch further upgraded the chip from PCI to PCIe.

The net lower costs mean the company can now address cost-sensitive markets, such as security and surveillance systems, said Lytle. "We are still the only people doing processors with a programmable fabric embedded into the processor," he said.

A version of the chip without the Express interface samples in July and will sell for $25. A version with Express samples in Q4 and will sell for $30. Both will be in production by the end of the year.

- Rick Merritt
EE Times

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