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Flash interface boosts I/O bandwidth by tenfold

Posted: 09 May 2007 ?? ?Print Version ?Bookmark and Share

Keywords:Mosaid flash interface? I/O bandwidth? memory interface?

Mosaid Technologies Inc. is unveiling a new memory interface that it claims will increase I/O bandwidth in flash by more than ten times today's conventional devices.

HyperLink NAND (HL-NAND) will be used in host controllers and shouldn't require any changes to the flash devices themselves. It can be used with a range of memory technologies, including NAND, NOR and emerging memories such as phase-change RAM.

Initially, the best application looks like the quickly expanding market for solid-state disk drives, which is set to grow to $14 billion by 2011, according to Web-Feet Research. Currently, SSDs use fasterand more expensivesingle-level cell NAND flash. HyperLink would enable the use of cheaper multilevel cell NAND because it could compensate for the slower read and write speeds.

"Many of today's high density NAND flash components are suffering from degraded performanceprimarily reduced write speeds and lower endurance than the last generation of devicesbecause of fundamental architectural and interface constraints," said Alan Niebel, CEO of memory and storage market at Web-Feet.

Niebel said HL-NAND could shake up the prospects for products based on multilevel cell flash chips. "Mosaid has developed a novel device architecture, a new interface standard and an innovative write scheme to reverse the degradation trend and offer very significant improvements to the performance and reliability of solid state drives and other components that use NAND flash memory," he said.

In a technology white paper, Mosaid said the architecture links up to 255 NAND flash devices in a point-to-point, bank-oriented ring topology. That enables transfer speeds up to 800Mbps, beating out the interface transfer rates of Serial ATA (300Mbps), Serial Attached SCSI (300Mbps) and Fiber Channel (400Mbps).

The company said a new write scheme significantly increases endurance and lowers power, but it did not immediately provide specifics on power reduction.

Current NAND devices are programmed on a page level and erased in larger block sizes. Mosaid said HL-NAND's new write scheme allows for page erase, multipage/block erase, partial block erase and random page program operations. This reduces copy overhead for wear-leveling operations and enhances system endurance by 30 percent, the company said.

At least one host controller customer, Phison Electronics Corp., has licensed the technology.

- Mike Clendenin
EE Times

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