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Optical transceiver moves data at speed of light

Posted: 16 May 2007 ?? ?Print Version ?Bookmark and Share

Keywords:optical transceiver? optoelectronics? CMOS technology? optical I/O?

IBM Corp. is getting closer to solving one of the most vexing challenges in optoelectronics: harnessing the speed of light to transmit data to an electronic interface flawlessly. The company made its initial efforts public at the Optical Fiber Communication Conference last March, where IBM scientists reported on a prototype optical-transceiver chipset that transfers data at 160Gbps!eight times faster than currently available optical components.

"The transceiver is fast enough to reduce the download time for a typical high-definition feature-length film to a single second compared to 30mins or more," said Marc Taubenblatt, senior manager of the optical-communications group at IBM's T.J. Watson Research Center.

The ultimate goal is to integrate the technology onto small PCBs, so as to house the components within a PC or STB. To minimize costs, IBM researchers built an optical transceiver with a driver and receiver chips in common CMOS technology, and coupled it with optical components of III-IV materials!indium phosphide and gallium arsenide. The entire integrated package measures 3.25-by-5.25mm.

Darpa roots
The research is part of the Defense Advanced Research Projects Agency's Chip to Chip Optical Interconnect program and initially was conducted in conjunction with Agilent Labs, until Agilent Technologies sold off its Semiconductor Products Group.

"We are working with several companies to bring this project to the next phase!that of system testing," said Taubenblatt. "One challenge is to develop a PCB that has the integrity to withstand the stringent reliability of having 16 optical channels mate with the electronics!and to fabricate such a board in volume." He foresees that happening "no earlier than in five to six years."

According to IBM senior research staff member Clint Schow, the parallel optical links between modules on the same circuit board or between boards through a backplane hold the promise of simultaneously optimizing critical interconnect parameters: data throughput, density, power consumption and latency.

"In our Terabus program, we are developing technologies for high-speed, dense, low-power interchip optical interconnects using PCBs with integrated optical waveguides," he said.

IBM researchers built an optical transceiver with a driver and receiver chips in common CMOS technology, and coupled it with optical components of III-IV materials. The entire integrated package measures 3.25-by-5.25mm.

Terabus technology
Schow detailed a single-chip CMOS optical transceiver that uses key aspects of the Terabus technology: high-speed, low-power CMOS analog amplifier circuits; efficient, emitting photodiode and vertical-cavity surface-emitting laser (VCSEL) arrays that operate at 985nm; and the exclusive use of flip-chip packaging to minimize both the module footprint and associated packaging parasitics.

"This transceiver chipset is designed to enable low-cost optics by attaching to an optical PCB employing densely spaced polymer waveguide channels using mass-assembly processes," said Schow.

The device consists of a flip-chip-attached 4 x 4 photodiode and VCSEL arrays with integrated backside lenses (as well as assembly alignment features). The arrays are arranged on a pitch of 250-by-350?m, with a 62.5?m shift between adjacent rows. This layout facilitates optical coupling of the 2D array of devices to a 1D array of waveguides on a 62.5?m pitch, Schow said.

"We wanted to keep the cost down," said Taubenblatt, "so we used a common CMOS process." The transceiver chip!fabricated in the IBM CMOS8RF-LM technology, a 130nm industrial process with eight metal layers!consists of 16 independent laser-diode driver (LDD) circuits and 16 receiver amplifier (Rx) circuits arrayed in separate 4 x 4 blocks.

"We have demonstrated single-channel versions of the LDD and RX circuits that run at data rates as high as 17Gbps," Taubenblatt said.

Low power draw
The voltage sources used to power the chip were adjusted to overcome the series resistance in the on-chip power-distribution networks to yield the targeted voltages at the core circuitry. The total core power consumption, including both transmitter and receiver, is 2.5W.

"We are looking at a different bonding mechanism for the next integration phase than the common flip-chip solder bumps we are currently using," said Taubenblatt. The transceiver was assembled by flip-chip bonding the optoelectronic arrays to the CMOS IC; the module was tested using a lensed 50?m multimode-fiber probe for the optical I/O of the transceiver channels, and planar microwave probes for the high-speed data I/Os.

Schow explained: "Optical eye diagrams produced by each of the 16 transmitters in the transceiver chip show a clearly open eye at 15Gbps, which indicates that the transmitters are capable of higher-speed operation than the nominal 10Gbps data rate used for the bulk of the transceiver characterization."

A preliminary investigation into transceiver channel-to-channel crosstalk shows that degradation in performance due to transmitter-to-transmitter, transmitter-to-receiver and receiver-to-receiver crosstalk had a negligible effect on overall transmitter or receiver performance, the researchers said.

- Nicolas Mokhoff
EE Times




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