Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

Platforms upgrade custom IC, PCB design

Posted: 17 May 2007 ?? ?Print Version ?Bookmark and Share

Keywords:Virtuoso Multi-Mode Simulation? Virtuoso AMS Designer? complete simulation-verification tool?

Cadence Design Systems is claiming significant upgrades this week in two key areascustom IC design and PCB design. The company claims to have a "complete" custom IC simulation and verification solution, along with an advanced constraint-driven PCB design flow.

Cadence is announcing the release 6.2 of its Virtuoso Multi-Mode Simulation (MMSIM), which combines Spice, Fast Spice, RF and mixed-signal simulators in a shared licensing arrangement. The solution promises a common, integrated database of netlists and models, allowing designers to switch from one simulation engine to another without compatibility issues or interpretation problems.

"All MMSIM simulators share the same interface for reading netlist and models," said Sandy Mehndiratta, product marketing director for Virtuoso at Cadence. "This guarantees zero correlation errors as you move from one simulator to the other. For example, you can run Spectre on an ADC block, then integrate the ADC with a large DSL block and simulate the full chip using UltraSim."

The individual simulators within the Virtuoso MMSIM suite claim a number of enhancements. For example, the Spectre circuit simulator adds an optimized engine that claims up to 3X performance improvement over traditional Spice simulators, and an enhanced Monte Carlo analysis that reduces simulations by a factor of ten.

Spectre XL adds an enhanced frequency-domain, multi-rate harmonic balance engine for RF circuits, a time-domain "shooting" algorithm for non-linear circuits, a new flow for noise and jitter analysis and integrated analog, RF and IC simulation capabilities.

The UltraSim full-chip simulator claims a high-performance digital solver and an easy-to-use flow for electromigration and IR drop analysis. The Virtuoso AMS Designer claims performance improvements when used with UltraSim XL, and enhanced mixed-signal RF capabilities with integration to Spectre XL. A "token based" licensing model lets designers use multiple simulation technologies while reducing costs, Cadence claims.

Meanwhile, Cadence's Allegro PCB design platform claims a number of enhancements that "improve usability and productivity," according to Steve Kamin, product marketing manager for Allegro. He noted that it includes the Global Route Environment technology previewed by Cadence earlier this year. That technology combines a graphical interconnect flow planning tool with a hierarchically-aware "global" router.

Cadence claims Allegro has been updated to include a new methodology for physical and spacing constraints using the Cadence Constraint Management System, a common cockpit which provides constraint management throughout the entire PCB flow. Other updates include support for algorithmic modeling for advanced serial-link design, improved circuit simulation, scalability with Cadence OrCAD products, enhanced collaboration and a new user interface.

The new release promises to shorten the development time for designs with a large number of differential signals by as much as 60 percent. It offers new capabilities to reduce design time for advanced I/O interfaces, such as PCIe and DDR2. It also offers new functionality for signal integrity and power integrity analysis to shorten interconnect design time. The new Allegro platform version is slated for a June release.

- Richard Goering
EE Times




Article Comments - Platforms upgrade custom IC, PCB des...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top