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Self-test memory system increases chip yield rate

Posted: 18 May 2007 ?? ?Print Version ?Bookmark and Share

Keywords:self-test memory system? increase chip yield? embedded memory test?

Faraday Technology Corp. has launched its repairable memory development system, REMEDE. The fully integrated embedded memory system, which is comprised of built-in-self-repair (BISR) function and the fuse group (fuse compiler), is said to increase overall chip yield, reduce chip cost and enhance manufacturing test quality.

Unlike other approaches which can only deal with one memory type at a time, REMEDE features high flexibility to support multiple memory types at one time, which maximizes the efficiency of analysis time and saves the chip size. Also, REMEDE has integrated all required functions, including self-test, repair-analyzer and self-repair to eliminate the need for the time-consuming verification process.

"For SoC designers, this solution overcomes their challenges for adding embedded memory test and repair functionalities into complex SoCs in a timely manner, and helps them to recover yield loss by fixing on-chip memory blocks," said Hsin Wang, VP of IP business and technology at Faraday.

The REMEDE in UMC 0.13?m is available now. The models in 90nm and 65nm will be made ready in Q3 and Q4 07, respectively.

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