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SerDes core is PCIe 2.0-compatible

Posted: 30 May 2007 ?? ?Print Version ?Bookmark and Share

Keywords:SerDes core? PCIe 2.0 compliant? 90nm process?

At last week's PCI-SIG Developers Conference., NEC Electronics America introduced a new SerDes core based on its advanced 90nm process technology.

The core is compatible with a variety of high-performance serial interconnects, including PCIe 1.0 and 2.0, Serial ATA, SCSI, XAUI and the Optical Internetworking Forum's Common Electrical Interface (CEI).

In addition to operating from 1.2-6.4Gbps, the new core has one of the lowest power consumption ratings and one of the smallest core sizes in the industry. Moreover, a unique built-in functionality allows users to capture receiving data waveforms dynamically on their system boards, minimizing the design risks typically associated with SerDes technology.

"NEC Electronics has developed a SerDes core that can be used with a number of high-speed serial interfaces, including PCI Express 2.0," said Kats Nakazawa, general manager, digital consumer and connectivity strategic business unit, NEC Electronics America. "The core also can be used with a wide range of packages, including a wire-bonded plastic BGA and a flip-chip BGA (FCBGA). The wire-bonded package enables designers to cut packaging costs significantly."

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