Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Manufacturing/Packaging

TSMC channels 'Flow' to deal with 45nm design challenges

Posted: 07 Jun 2007 ?? ?Print Version ?Bookmark and Share

Keywords:45nm methodology? design challenges? TSMC reference flow?

Foundry titan Taiwan Semiconductor Manufacturing Co. Ltd (TSMC) claims that its latest design methodology increases yields, lowers risks and improves design margins. Reference Flow 8.0 supports the company's 45nm process technology with advanced standard cell, standard I/O, and SRAM compiler.

"TSMC's 45nm process technology requires ever-deeper collaborations with EDA vendors and other partners in our design ecosystem," said Kuo Wu, deputy director of design service marketing at TSMC. "Reference Flow 8.0 provides a seamless link between the designers and advanced process technologies."

Reference Flow 8.0 supports TSMC's Active Accuracy Assurance initiative, which defines standards of accuracy for all partners in TSMC's design ecosystem, as well as for TSMC itself. According to the company, Reference Flow 8.0 focuses on ease of use, providing a reference of qualified design building blocks that give designers a proven path from specification to tape out. It not only supports 45nm, 65nm, and 90nm design rules, but also design flows for mainstream technologies from 0.13?m to 0.25?m.

Expanded offering
With Reference Flow 7.0, TSMC introduced what it claimed was the first foundry design methodology to include inter-die statistical timing analysis, which accurately determines the timing effects of manufacturing process variations.

Reference Flow 8.0 expands on this capability by offering intra-die statistical timing analysis along with statistical leakage and statistical timing optimization. Statistical leakage provides a more precise analysis of leakage that reflects actual manufacturing outcomes. Statistical timing optimization helps reducing the need for over-design and enables more effective timing closure. These features, says TSMC, enable designers to optimize design margins and increase yields.

TSMC also notes that the new design methodology offers enhancements in DFM methodology, allowing designers to address potential manufacturing challenges during the design process rather than post-processing after tape-out. In addition, Reference Flow 8.0 includes several power reduction techniques.

Article Comments - TSMC channels 'Flow' to deal with 45...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top