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TSMC, Cadence team on 65nm wireless design flow

Posted: 28 Jun 2007 ?? ?Print Version ?Bookmark and Share

Keywords:65nm wireless design flow? RF design kit? networking device?

Cadence Design Systems Inc. and Taiwan Semiconductor Manufacturing Company (TSMC) have teamed on nanometer wireless design and produced a new TSMC 65nm RF process design kit (PDK) compatible with the new Cadence Virtuoso custom design platform, and downloadable RF, analog and mixed-signal (AMS) design-flow demonstration packages for wireless designers.

The RF and AMS design-flow demonstration packages are a part of the continuous collaboration between the two companiesto build and enhance comprehensive design infrastructures. Together, Cadence and TSMC focus on enabling support for designers of advanced SoCs, such as wireless and networking devices, which use analog, mixed-signal and RF technology in addition to digital content.

The demonstration packages contain TSMC 65nm RF-enabled design examples for RF and AMS block creation, application notes and methodology documentation, and a design example-circuit database with complete execution scripts and flow, covering simulation, design creation and analysis, allowing designers to observe the complete flow in an actual design. The new Virtuoso IC based 65nm RF PDK and TSMC's Nexsys 65nm LP standard cell library are both downloadable from the TSMC Website.

"With this collaboration, wireless chip designers now have a comprehensive set of interoperable design tools, methodologies and process technologies necessary to achieve shorter, more predictable design cycles for highly integrated, 65nm RF and AMS designs," said Kuo Wu, deputy director of design service marketing at TSMC. "The combination of TSMC process technology and libraries and Cadence design flow provides a full, end-to-end solution for designers of wireless SoCs."

"Both Cadence and TSMC recognize that collaboration on projects such as the 65nm wireless design-flow demonstration package result in more holistic solutions that benefit the design community. In this effort, we're enabling designers in the wireless segment to improve the quality and predictability of advanced SoC designs," said George Kuo, group director of industry alliances at Cadence.

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