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V58C2256(804/404/164)SC high performance 256Mbit DDR SDRAM

Posted: 13 Jul 2007 ?? ?Print Version ?Bookmark and Share

Keywords:DDR DRAM? high speed data transfer rates?

The V58C2256(804/404/164)SC is a four bank DDR DRAM organized as 4 banks x 8Mbit x 8 (804), 4 banks x 4Mbit x 16 (164) or 4 banks x 16Mbit x 4 (404).

The V58C2256(804/404/164)SC achieves high speed data transfer rates by employing a chip architecture that

prefetches multiple bits and then synchronizes the output data to a system clock. All of the control, address, circuits are synchronized with the positive edge of an externally supplied clock. I/O transactions are occurring on both edges of DQS.

Operating the four memory banks in an interleaved fashion allows random access operation to occur at a higher rate than is possible with standard DRAMs. A sequential and gapless data rate is possible depending on burst length, CAS latency and speed grade of the device.

Please view the PDF document for more information.

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