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Floating point coprocessor handles GPS data

Posted: 17 Aug 2007 ?? ?Print Version ?Bookmark and Share

Keywords:floating point coprocessor? GPS? embedded data?

Micromega Corp. has released the uM-FPU V3.1 floating point coprocessor chip that extends the powerful feature set of the original uM-FPU V3 chip to include serial I/O support, NMEA sentence parsing, block transfers, additional matrix operations and string support, and many other enhancements.

The new serial I/O capabilities with NMEA sentence parsing makes it easy to add GPS data to embedded system designs. GPS data can be read and processed directly by the uM-FPU V3.1 chip, saving I/O pins, memory space and execution time on the MCU, which can then be used for the main application. As an added benefit, GPS data is immediately available on the uM-FPU V3.1 chip for further navigational calculations using the powerful floating point instruction set.

The uM-FPU V3.1 chip interfaces to virtually any MCU using an SPI interface or I?C interface, making it ideal for MCU applications requiring floating point math, including GPS, sensor readings, robotic control, data transformations and other embedded control applications.

The uM-FPU V3.1 chip supports 32bit IEEE 754 compatible floating point and 32bit integer operations. Advanced instructions are provided for fast data transfer, matrix operations, multiply and accumulate, FFT calculations, serial I/O, NMEA sentence parsing and string handling. The chip also provides two 12bit A/D channels, two digital outputs, an external event counter, flash and EEPROM storage and serial I/O up to 115,200 baud.

The uM-FPU V3 IDE makes it easy to create, debug and test floating point code. The IDE code generator takes traditional math expressions and automatically produces uM-FPU V3.1 code targeted for any one of the many MCUs and compilers supported. The IDE also supports code debugging and programming user-defined functions. User-defined functions can be stored in flash using the IDE or stored in EEPROM at runtime. Nested calls and conditional execution are supported. User-defined functions can provide significant speed improvements and reduce code space on the MCU.

The uM-FPU V3.1 chip is RoHS compliant and operates from a 2.7V, 3.3V or 5V supply with power saving modes available. SPI interface speeds up to 15MHz and I?C interface speeds up to 400kHz are supported. The chip is available in an 18-pin DIP, SOIC-18 or QFN-44 package. The single unit price is $19.95 with volume discounts available.

- Henri Arnold
EE Times Europe




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