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DSP silicon takes many forms

Posted: 03 Sep 2007 ?? ?Print Version ?Bookmark and Share

Keywords:DSP? DSP chips? DSP core? silicon forms?

By Will Strauss
Forward Concepts

The market for chips based on DSP technology is far greater than the "DSP chip" market. Forward Concepts estimates that the traditional DSP chip market is only a third of the total market for DSP-based silicon. Certainly, the general-purpose programmable DSP is the most visible product, since the newest versions represent state-of-the-art semiconductor technology in addition to novel architectures that make them the product of choice for most new DSP applications. And it is the great breadth and depth of development tools and software support that makes those traditional DSPs the first place to prove in new product concepts.

However, there are a number of other chips based on DSP technology that people don't call DSP chips. For example, simple MP3 players are based on DSP technology, but most are based on RISC chips with added DSP hardware. That's feasible because the DSP "horsepower" demands for decoding MP3 music are relatively modest. And, because of the high volumes involved, MP3 player chips tend to be ASICs based on SoC solutions. All of the traditional RISC IP vendors like ARC, ARM, MIPS and Tensilica have added DSP capabilities to their product offerings.

But when more DSP horsepower is required, ASICs are often implemented using DSP cores, whether fabricated by one of the traditional DSP chip houses using their own cores or through licensed cores from companies offering DSP IP, like Ceva and VeriSilicon.

DSP in FPGA
FPGAs are also popular for an increasing number of applications, not only because of their significant speed, but also because of their flexibility. FPGAs have been implemented as the fastest instances of DSP silicon. Truth be known, Altera and Xilinx are major vendors of DSP silicon, with DSP revenues that rival those of some traditional DSP chip suppliers.

"Hardwired" DSPs are often required for inexpensive high-speed computation like MPEG-4 or H.264 decoding and tend to be based largely on state machines and SIMD cores rather than conventional DSPs. MPUs (especially the PowerPC) and MCUs (like Freescale's ColdFire products) are also employed in DSP-specific products. Media processors and so-called "application processors" are special cases of DSP-capable RISC engines designed for audio/video applications.

A number of chip vendors employ their own proprietary DSP core. For example, Qualcomm, the second largest vendor of DSP silicon (not "DSP chips") employs theirs in a portfolio of cellphone baseband chips. Since the company sells no off-the-shelf programmable DSPs, their involvement in DSP technology often goes unnoticed. Other major vendors of DSP silicon that don't sell DSP chips include Marvell Semiconductor, Infineon and Broadcom.

To illustrate the variety of chips employed for DSP functions, the results from our latest survey of DSP professionals are presented in the accompanying chart. Note that programmable DSPs, in the forms of fixed-point and floating-point chips, were the most popular responses by our survey audience, but there were other computational platforms employed for DSP that were also cited. Note that multiple responses were allowed, and many respondents employ both general-purpose DSPs and one or more of the other platforms. For example, conventional DSPs coupled with FPGAs are popular for wireless base station applications.

Chip types employed for DSP

Popular responses by our survey audience

Several chip startups are in the process of fielding massively parallel processors for DSP, and the chart indicates some traction in this area. Certainly, multicore implementations are desirable for both conventional data processing and for digital signal processing; however, data processing applications have generally been limited to symmetrical multiprocessing (SMP) of two to four chips, but made more efficient in some cases through hyperthreading. These techniques also work for DSP, but many feel that massively parallel arrays of relatively simple processors offer a better solution for many applications, especially those in communications and video. But it's not easy to design such an architecture that is also reasonably easy to program.

Multicore DSP
The multicore motivations are several. In video processing, for example, ARC International has stated that a generic RISC processor would have to clock at 5GHz for MPEG-4 encoding and would have to clock at 18GHz for H.264 encoding. To get around such limitations, ARC has recently introduced the VRaptor line of licensable audio/video solutions which add multiple SIMD processors and accelerators for motion estimation and entropy coding to its ARC 700 CPU.

Certainly, using multiple RISC or DSP chips is a solution that some companies are using today. However, those multiple chips strain power dissipation and cost budgets. We've seen five or more $200 DSPs employed for real-time H.264 and MPEG-4 encoding. Certainly, that's not an approach leading to long battery life in multimedia-intensive cellphones of the future. Some startups are offering massively parallel arrays of relatively simple processors to better address high-end DSP applications at lower clock rates, resulting in lower power consumption. Such architectures lend themselves primarily to DSP applications, since many DSP algorithms are vectorizable and map better into parallel processors than conventional data processing code.

For example, Aspex Semiconductor chips (with up to 4,096 processors on a chip) have been successfully employed in image processing systems and picoChip Designs chips (with up to 322 processors) have been successfully fielded in WiMAX base stations and is now appearing in so-called "femtocells" for home application. In addition, new massively parallel chips have been launched within the past year by companies like Ambric (up to 360 processors), Rapport (256 processors) and Stream Processors (80 processors).

Sure, there are several instances of 100 or more RISC processors on a chip, but all that we have seen are simply heterogeneous solutions whereby each processor is independently programmed for a separate task. Parallel arrays, on the other hand, tend to be homogeneous solutions directed at a single task or a bounded task set. One of those bounded task sets can be found in communications. The move to OFDM modulation techniques employed in WiMAX, LTE and 4G applications requires a heavy processing load for Fast Fourier Transforms (FFTs). Some see massively parallel solutions as ideal for the fast-growing OFDM market and we believe that most of the traditional cellphone chipmakers have development programs for such architectures underway.

Then there are a few chip startups aiming at dynamically reconfigurable logic (DRL) array architectures, which can quickly reconfigure their computational logic within a few nanoseconds. Although memory-based FPGAs are truly reconfigurable in terms of their logic and circuitry implementations, some argue that they are only "occasionally" reconfigurable, with reconfigurability times measured in a few seconds to several minutes. The highest and best use of DRL approaches is assumed to be software-defined radio (SDR). Although military and first-responder radio applications appear to be practical SDR markets, civilian use appears to be less practical. One chip company employing the DRL approach for communications is Japan-based IP Flex, which has found some success in NEC cellular base stations.

In summary, DSP algorithms are best executed on architectures optimized for particular applications or specific vertical markets. Consequently, DSP silicon comes in many forms; forms best suited for target markets.

About the author
Will Strauss
is president of Forward Concepts and an internationally known industry analyst. He is considered the leading authority on DSP market trends. He is also an authority on semiconductor trends in wireless, audio and VoIP markets.




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