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Image sensor, processing at heart of digital SLR

Posted: 04 Oct 2007 ?? ?Print Version ?Bookmark and Share

Keywords:DSLR? X3 image sensors? CMOS sensors?

Digital SLR (DSLR) cameras have improved drastically in performance over the past year alone, with 8Mpixel cameras now commonplace and at reasonable prices. That said, all such cameras remain constrained by a well-defined optical format and lens design base, the physical geometry of the camera and, of course, cost. Add to that the exponential cost associated with scaling CMOS sensors to reach the size of 35mm film, and therein lies a problem: Camera manufacturers are forced to trade resolution for the noise associated with shrinking pixel size.

Enter the Foveon X3 14.1Mpixel image sensor. X3 image sensors have three layers of vertically stacked pixels. The layers are embedded in silicon to take advantage of the fact that red, green and blue (RGB) light penetrate silicon to different depths, allowing it to show full color at every point on the captured image, vs. the interpolation of RGB pixels in a typical array. "The big advantage is that we can do more per unit area," said Richard Turner, VP of marketing for Foveon. It also has all the advantages of being CMOS, instead of CCD.

In addition, there are less-quantifiable advantages to the images taken with an X3 sensor, said Turner. These are attributable to the brain's ability to pick up intricate color images and create a perceptual response. This, in turn, is what gives X3 images more "pop" and vibrancy, he said.

It was these features that encouraged Sigma to select the 14.1Mpixel X3 sensor for its advanced Sigma SD14 DSLR, a $1,600 camera built upon its SD9 and SD10 predecessors and which has gotten very positive reviews to date.

While some say the Foveon requires more processing than other sensors, Turner said that while it does require different processing, it doesn't need intensive color interpolation processing, "so it's a wash."

HTC X7500

A rich feature set encouraged Sigma to select Foveon X3 for its Sigma SD14.
(Click to view teardown.)

In any case, with 14.1Mpixels, high-performance processing at low power is critical. To this end, Sigma selected the 600MHz, 2,400 MACs, ADSP BF561 from Analog Devices Inc. This is supported by a Xilinx Spartan-3 XC3S200, a 200,000 gate FPGA optimized for low cost. Between the sensor and the DSP is an AD9228 quad, 12bit, 40/65MSps ADC with an on-chip sample-and-hold circuit. Turner said the AD9228 is needed to handle the three 12bit streams coming off the sensorin parallel. This compares with the 1pixel, 12bit-wide stream coming off a typical sensor.

The main processing board with the DSP and FPGA is supported by four banks of 512Mbit SDRAM chips from Samsung (K4S511632D-UC75). Next comes the main control board, at the heart of which is the MegaChips DSC-3H, which integrates all the main digital camera functions, from I/O and sensor communication to JPEG image processing.

Also residing on the main board are two banks of Samsung K4S561632H-UC75 256Mbit SDRAM. This provides buffering for shuffling data about and for burst-transfer operations to interfaces such as the flash card, the slot for which is also on this board. There is also a 64Mbit NOR flash (Toshiba TC58FVM6B5BTG65, 48-TSOP). The image display is via a Casio LCD.

- Patrick Mannion

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