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Altera, TSMC extend relationship to 45nm

Posted: 15 Oct 2007 ?? ?Print Version ?Bookmark and Share

Keywords:manufacturing process? 45nm process? FPGA?

Building on their successful partnership on 65nm node, Altera Corp. and Taiwan Semiconductor Manufacturing Co. (TSMC) will extend their collaboration to produce FPGAs in the 45nm node.

Two years ago, TSMC unveiled its 65nm manufacturing process and FPGA maker Altera and others were taping out 65nm designs. The first 65nm process was optimized for low power, followed by a high-speed version. The 65nm process already included the use of strained silicon and nickel silicide, low-k dielectrics and copper interconnects.

"All of these fundamental technologies and techniques are to be use in the 45nm process, but new challenges abound," said Mojy Chian, VP of technology development at Altera. "There are many more transistors on the die and they are packed very close, and transistor leakage is way up because they are running much faster."

Strong collaboration
Chian, who is responsible for all aspects of silicon process technologies at all nodes for Altera, including yield improvement and defect-density reduction at 65-, 45- and 32nm nodes, said that the only way to get these issues under control is "through a strong collaboration with TSMC."

"This September we had 45nm completely qualified and ready for early production. Of course, the transistors at 45nm have 0 of separation, making it very difficult to improve yields, especially with the restricted design rules and stringent engineering we use on the transistors at 45nm." said Di Ma, VP, field technical support at TSMC, North America.

Chian noted that the transistors exhibit a higher IR drop, as well as a supply voltage that hovers around 0.9- to 1V, limiting possibilities for further scaling. "A lot of nasty things are coming together at 45nm," said Ma. "While we firmly believe in Moore's Law, we see that at 45nm we are faced with aggressive, concurrent process and design challenges. The only way we can overcome the hurdles is to cooperate with each other."

Altera and the Taiwan foundry have worked together exclusively in FPGA technology for more than 12 years. "We work closely together, from design through tape-out, and we continually refine the manufacturing process, making the implementation of current and future nodes as consistent and efficient as possible," said Altera's Chian.

Meanwhile, Ma said that TSMC delivers a new advanced-technology generation every two years. Each node surpasses the previous one by close to half the area and "features 30 to 50 percent more performance, while supporting similar leakage levels," according to Ma. TSMC provides substantial advanced-technology capacity by ramping the same node at multiple 300mm GigaFabs that, when at full capacity, can produce more than 100,000 12-inch wafers per month.

45nm challenge
To stay on a 60 percent improvement rate per year, the TSMC 45nm process combines 193nm immersion photolithography, silicon strains, and extreme low-k (ELK) inter-metal dielectric material to "bring both performance and reliability to advanced technology designs", said Ma.

"The 45nm low-power process provides the double-gate density of 65nm, with significantly lower power and manufacturing costs per die, making it ideal for small-footprint designs, like those used in cellphones and other handheld devices," said Ma.

But at every step of the way moving through the 45nm process, there are constant adjustments that must be made based on the feedback from design rules and process steps.

"The device-modeling parameters are increasing tremendously," said Altera's Chian. "The latest modeling parameters that need to be extracted use up to 90,000 lines of code, compared with some 40,000 lines for the 65nm process. By constantly feeding off the design-process feedback mechanism set up within our 10- to twelve-person teams, we can be sure to meet our goals for a slew of high-performance, as well as low-power, FPGAs fabbed with 45nm design rules."

Altera expects to offer 45nm FPGAs next year.

- Nicolas Mokhoff
EE Times

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