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Wanted: an IP manager

Posted: 22 Oct 2007 ?? ?Print Version ?Bookmark and Share

Keywords:IP manager? chip design? IP cores? intellectual property?

Susan Cain and Jim Lipman
Cain Communications

Whenever certain SoC design tasks take on a high level of importance (for example, being on the critical path of design completion), design teams usually add a task-specific manager. Examples include a testability manager (when DFT becomes an important part of chip design), a physical layout manager (when shrinking process nodes and increased clock speeds make layout very difficult), and, more recently, a DFM manager (when help is needed to ensure maximum yields, and profits, for chip vendors). But the question remains: Where is the IP manager?

Integrating several IP cores on an SoC has become a normal part of a design team's activities. The various IP has to meet quality, testability, reusability and other criteria to be used on the chip. Owing to a lack of industry-wide specifications for these criteria, the job of successfully integrating different IP, from several diverse sources, onto a single chip has become more and more difficult. De facto standards for selecting IP and IP vendors, such as the VSIA's Quality IP (QIP) metric and the IP-XACT from the Spirit consortium, are few and far between and are still in flux, although adoption is growing. This creates a need for a person to fill a particular role on an SoC design team: that of IP manager, responsible for overseeing the selection, use and verification of the various IP cores on a chip, someone who is in touch with the various industry organizations that can help the company benefit from available standards.

Using IP from within the chip developer's organization does not eliminate the need for an IP manager on each design team. Internally developed IP is subject to different evaluation and quality criteria, depending upon from which group within an organization it is obtained. Only a few chip companies (mostly large ones) have the resources to put in place a corporate-level IP development and usage policy. Even the ones who do still should have a person on each SoC design team who is IP-savvy and familiar with the specific requirements of the design on which the IP will be used.

We are not saying that IP managers don't exist on some design teams (they do) but that the design projects that can boast of having managers on their design teams who are dedicated to successful integration of IP are rare. To us, this seems strange, because so many designers complain that the IP they receive for their projects does not live up to the claims made about it.

The semiconductor industry sadly has a reputation of not being proactive in anticipating and avoiding problems. Giving an SoC design team the resource it needs in the form of a dedicated IP manager will certainly help minimize the problems associated with integrating IP not developed as part of that team's design project. IP integration problems are very real: but this is an area in which chip vendors can do something now simply by putting an IP manager in place.

About the authors
Susan Cain
is president of Cain Communications, an agency she founded in 1994 to provide marketing communications services to semiconductor, IP and EDA companies of all sizes. For several years, she was the executive director of the VSI Alliance, a semiconductor IP organization.

Jim Lipman before joining Cain, was responsible for all editorial matter as content director at TechOnLine and also spent several years as EDN Magazine's ASIC and EDA technical editor.

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