Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Formulating an EDA solution to ESI

Posted: 01 Nov 2007 ?? ?Print Version ?Bookmark and Share

Keywords:signal integrity analysis? EDA solution? electrical signal integrity?

The growing demand for cheap wireless consumer applications calls for unprecedented levels of integration. Huge digital IPs such as microprocessors, DSPs and encryption engines are being assembled together with analog blocks (e.g. power supply control, data conversion) and RF LNAs, voltage-controlled oscillators (VCOs) and mixers. The aggressor generates lots of interfering noise, which gets disseminated throughout the entire system to degrade the operation of the most sensitive circuitry (the victim).

The entire electrical signal integrity (ESI) mechanism is very complex. It affects digital operation through IR drop, crosstalk and delay, as well as analog and RF. For analog and RF, the impact is rather more complicated as very small noise levels will produce dramatic influences at any time.

Among the challenges to address ESI impact on analog and RF victims, modeling noise generation and injection is particularly tricky. The issue is to collect the power supply and substrate currents in both time and frequency domains.

View the PDF document for more information.

Article Comments - Formulating an EDA solution to ESI
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top