FPGA simulators produce CameraLink images

Supplier of FPGA-based compute accelerator systems GiDEL has announced their new PROC_CamSim product that can automatically generate CameraLink images during image and vision system development without the use of real cameras. The PROC_CamSim system consists of the CamSim host-based software application, an FPGA board and CameraLink driver daughter board.

Some key capabilities of the PROC_CamSim CameraLink camera simulator are as follows:

? Simulates the behavior of any CameraLink camera

? Outputs 1-8pixel channels simultaneously at 7-85MHz pixel clock

? Pixel depth varies from 8-36bits/pixel (30- and 36bpp are not supported in the initial release)

? Supports continuous line scan mode

? Fully configurable timing

? Frame sources can be SW buffer (image or video) or HW generated patterns

Features
The GUI-based CamSim Software is said to provide a fast and easy way to configure the simulator to mimic any CameraLink camera and to output any image to the Grabber side. The software configures all the simulation parameters, including timing and resolution, CameraLink channels structure and so forth. The application also provides the mechanism to decode and load AVI video or image data into the FPGA via the DMA channel and synchronize it with the hardware side. This video/image data can be used in addition to available static test patterns generated in hardware.

The PROC_CamSim hardware consists of two elements. Primary processing power is provided by either a PROCSparkII system (Cyclone II-35 FPGA and PCI bus interface) or a PROCe60 system (Stratix II-60 FPGA). The CameraLink physical layer interface and output to the system under development is provided by a PSDB_CL_OUT daughter board. The reconfigurable hardware generates valid signals at specified timing configuration, generates static test patterns and restructures data corresponding to the CameraLink channel configuration, and sets up serial communication with the frame grabber.

The CamSim Software configures the programmable FPGA hardware to define the current configuration of the simulator including pixel bit depth, timing, taps, frame source and so forth.

The system provides for customization by the development team. Users may develop their own software controller, based on an automatically generated PROC class, and thus build a custom software application to control the simulator. User can also implement their own custom FPGA designs based on a supplied template, insert their own configuration or control module in the FPGA design, and recompile to create their own simulator. Adding an optional PSDB_IO module extends the simulation IO interface to enable customization into a machine simulator.

Configurations with the PROCSparkII system are available today. Systems with the PROCe system will be available by year-end. Pricing is available upon request.

Upgrades of existing PROC systems to PROC_CamSim systems are also available with the additions of the appropriate hardware and software.

- Henri Arnold
Programmable Logic DesignLine