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Next SoC era calls for new business models

Posted: 16 Nov 2007 ?? ?Print Version ?Bookmark and Share

Keywords:multicore era? business partnership? embedded system?

A group at Microsoft Corp. is co-developing a media chip and investigating new on-chip bus structures. The activity is occurring at a time when semiconductor companies say they are increasingly delivering full software stacks with their chips, although they are not always compensated for the code.

Welcome to the next phase of the SoC era, in which system, software and semiconductor companies are struggling to find new technology and business models. All sides see the promise for using multicore devices to open up fresh markets. The big question is how to define chip-level platforms.

That dilemma lies at the intersection of two developments. Designers increasingly start their work by defining the end-user scenarios or experiences they want to create. As they move to implement those concepts in silicon, they find an increasing diversity of hardware and software components integrated in complex, off-the-shelf chips with varying degrees of programmability, but not always optimized for the chosen tasks.

"We brought a value proposition for a system to a fabless company but found that no chips met our requirements, so we had to ask them if we could develop something together," said Robert Rossi, group program manager for core media processing technologies at Microsoft. "We had conversations with their CEO and found out we could do it."

Microsoft has "several areas where the most advanced algorithms for a problem are in software from our research group, and the hardware for it just doesn't exist today," said Rossi, speaking during a panel at the October ARM Developers Conference. "So now we are looking three or four years down the road at a change we want to make in the market, and we're starting at the very root of the problem with a new partner. That's a major change for Microsoft."

Rossi has also done an analysis of the digital camera market that has uncovered an opportunity to bring fresh value, perhaps in a partnership with a chipmaker. Separately, Microsoft has been active in establishing a so-called XR version of JPEG that will expand the color space and dynamic range of the image standard, supporting 32bits per channel. Chipmakers are already designing devices supporting JPEG XR, Rossi said.

New platforms
Such new partnerships will compete with existing platform chips, such as ASSPs, that try to span multiple markets.

"I think the ASSP companies control too much of the destiny of the system companies," said ARM panelist Bryan Lewis, chief semiconductor analyst at Gartner Group. "The TI OMAPs of the world are trying to get a lot of design reuse out of their blocks and tools."

Lewis estimated that Texas Instruments Inc. has spent nearly $1 billion developing its OMAP cellphone platform. When OEMs and chipmakers partner to define such platforms, he said, "the question is, how does that platform evolve, and who owns the risk and the cost?"

Rossi said Microsoft has considered creating its own modular software platforms for products such as its Spot intelligent watch or its Windows CE OS. Chipmakers could implement chunks of the platform in hardware in a standard way, he said.

"We are interested in working with someone like ARM to create large system simulators so chip vendors could build component versions of our subsystems that could become ASICs or cores with extensions," said Rossi. "We need to go further in enabling a predictable partitioning of our intellectual property."

The situation is equally challenging for chip designers. "This year, we are shipping software independently of hardware for the first time," said panel member Colin Harris, chief operating officer of PMC-Sierra Inc. "But there is little price difference for us between selling a chip with a full software stack and a minimal one, and that's insane."

Anil Mankar, chief development officer for Conexant Systems Inc., said many systems vendors play fabless companies against each other to drive down the cost of silicon. In this environment, chipmakers find it difficult to add value, he said.

Multicore outlook
The discussion took place at the conference where ARM announced its latest processor, the Cortex-A9, optimized for multicore devices.

"It's absolutely necessary to go multicore to get the performance up without increasing power consumption at the same rate," said Tom Halfhill, Microprocessor Report senior editor, who had been briefed on the new core. "They will be competing head-on with ARC, MIPS and Tensilica, as well as with a lot of startups doing massively parallel architectures for targeted markets, such as base stations."

"In the embedded space, my preference is for asymmetric multiprocessing," said Rossi. "For these kinds of architectures, we are looking for chip-level tools to handle global resource contention, and various kinds of bus and core interconnect architectures to allow this kind of development."

"We can use these multiple-core chips," Mobashar Yazdani, a senior engineer in the printer group at Hewlett-Packard Co., said at the panel. "The problem is, it's not just a matter of porting applications to multiple processors. It's also a matter of debugging multiple complex interactions."

Multicore implementations gain at the expense of multiple discrete processors.

A good strategy for handling that problem is pushing all data coherency issues to a high level in the software and keeping separate apps as loosely coupled as possible, Yazdani said.

Embedded software developers can avoid the pain of moving to parallel languages by running separate programs or modules at a high level in parallel on multicore CPUs, Tomas Evensen, chief technology officer of Wind River Systems, said in a panel discussion at the conference in September. Such loosely coupled programs will not require much synchronization, Evensen said.

This calls for better standards for embedded systems to plow the way for multicore chips, said David Kleidermacher, chief technology officer of Green Hills Software, speaking at the event.

"Communicating with accelerators is a nightmare because every vendor has its own API," Kleidermacher said. That speaks to the need for an overarching standards effort, particularly between graphics processors and DSPs, he said.

But "that's not happening right now," Kleidermacher said. "Some chips may be too application-specific [to lend themselves to a standard approach], but I think we could find more commonality here."

In other areas, there are too many proposed standards. One such area is interprocessor communications, addressed by the Message Passing Interface and the Multicore Association's Transparent Inter Process Communication effort.

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