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Intel forms new group for SoC design venture

Posted: 10 Dec 2007 ?? ?Print Version ?Bookmark and Share

Keywords:SoC design? multicore processor? new Intel group?

Intel Corp. has established a new SoC enablement group led by veteran executive Gadi Singer, in line with the company's accelerating efforts both in multicore PC processors and SoCs for sockets outside its traditional PC markets.

"Every major element being developed going forward will be done in a way that makes it reusable," said Singer who has at various times led efforts on Pentium, Itanium and cellular processors and been head of design automation software at Intel. "We are defining practices, flows and architectures that will allow plug-and-play across all Intel products," he said of the new group.

The chip giant is not saying how big the new group is in terms of headcount or budget, but its mandate includes defining interconnects and test standards for silicon blocks and system-in-package devices. Singer and others noted making the SoC shift will not be easy for a company with a long heritage of custom design at the circuit level aiming at top performance.

"Developing something that is highly modular requires more effort which sometimes conflicts with other goals for a project so we do get some push back, but this extra effort is a very worthwhile investment," said Singer. "Going forward having SoC capabilities will be part of our competitiveness," he added.

Outside the PC box
Intel has stated it has at least four SoCs in the works for systems outside its traditional PC marketsTolapai is aimed at storage networks; Silverthorne at handhelds; Larabee at high-end visualization systems and Canmore at wired consumer devices. Each chip could be just the tip of a bigger iceberg.

"My group is funded to develop a family of SoCs for AC-powered consumer systems and the chips such as demodulators and tuners to go around them," said Bill Leszinske, general manager of Intel's consumer electronics group.

Leszinske joined the group two years ago in reorganization after Intel scrapped a high-profile effort to design silicon for microdisplays. In April, the group launched its first product, an XScale-based CPU for set-top boxes now used by Chunghwa Telecom in Taiwan. Besides the x86-based Canmore, Intel's consumer and embedded groups are also helping design a two-chip set aimed at printers.

The Intel consumer group has developed a block that handles MPEG2 and H.264 decompression for its set-top chip launched in April. It is upgrading that block, presumably for encoding, as part of the Canmore design. Intel also acquired about two years ago the division of Zarlink Semiconductor that makes demodulators and tuners.

"We have long multi-year road maps that include what IP we have or are developing and where we will work with partners [on IP]," said Leszinske.

As for interconnects to link those blocks "we will support both internal and some external interconnects standards because we need to have products compatible with elements like PCI and Windows device enumeration techniques," said Singer. "We already use a variety of blocks some of them from the outside."

In EDA tools, Intel is trying to consolidate "multiple tool flows [now in use for SoCs] into a unified SoC flow," a process that may take two years, said Singer. "You can't influence very much some products that are already in the pipeline, but you have much more influence over new products."

"Intel's heritage is to create a lot of our own design tools, but we are evolving to using more industry-standard tools," added Leszinske.

- Rick Merritt
EE Times

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