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Powerchip, IMEC team on sub-32nm memory processes

Posted: 31 Jan 2008 ?? ?Print Version ?Bookmark and Share

Keywords:R&D partnership? nanoelectronics research? sub-32nm memory process?

Taiwan-based memory semiconductor supplier Powerchip Semiconductor Corp. has entered into an R&D partnership with European nanoelectronics research center IMEC to develop solutions for the sub-32nm memory process generations.

Powerchip researchers will work with IMEC's advanced lithography program to address immersion, double patterning and EUV lithography challenges.

Frank Huang. Powerchip chairman, said that as photolithography technology approaches 32nm, the manufacturing process encounters physical limitations while development costs increase. Thus, the trend of alliances and joint development will become more and more eminent in the industry. Powerchip has decided to sign an agreement with IMEC to participate in its global research network in order to accelerate the advancement of process technology.

IMEC in Taiwan
"[Powerchip's] joining demonstrates our ambition to further expand our program with new leading partners, on the path to technologies below 32nm," said Gilbert Declerck, president and CEO of IMEC. "It emphasizes the increasing strength of our memory partner network, which is unique in the world. It also illustrates our commitment to further enforce our business in Taiwan, at the time when we're opening IMEC Taiwan in the Hsinchu Science Park."

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