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Why we need a new analog design flow

Posted: 18 Feb 2008 ?? ?Print Version ?Bookmark and Share

Keywords:analog design flow? verification flow? first-time-right design? multiple silicon spins?

By Nelson Seiden
Knowlent Corp.

Analog/mixed-signal designers need a first-time-right design methodology. Why is this familiar cry more urgent and probably truest this time? After all, we've heard EDA industry pundits and users raise the clarion call before.

The explosive growth of smarter cellphones, portable GPS systems and multimedia devices has provided electronics suppliers with potential for incredible growth. However, with the increase in market opportunity come equally accelerated pressures to deliver high performance, low power and reliable solutions much faster than before, and at continually shrinking average selling prices.

This new analog/mixed-signal design imperative is challenged by ever shorter development schedules, increasing price pressures, smaller geometry foundry processes (which yield lower cost chips in mass volumes) with increasingly magnified upfront development costs and the need for first-time-right design methodology.

As a result, semiconductor companies are compelled to put more technology on a single chip, creating much higher potential for error than before. Of overwhelming concern is the risk of multiple silicon spins to get to a production-worthy product and create a design that will yield enough good parts per wafer to justify the investment in the smaller geometry process.

Thorough verification
For this reason, semiconductor companies are facing the challenge of developing an analog/mixed-signal first-time-right methodology. Analog designs are notoriously sensitive to variations in temperature, noise and process variation, much more so than digital. These analog designs must be thoroughly verified against these variations and then analyzed within the context of the SoC after it is characterized at the block level.

Today, the process of developing test benches, characterizing designs and releasing them to the foundry is the responsibility of the design team. In most cases, designers work independently on various blocks and make the decision as to which analyses to run, what parameters to test and when to declare that the design is ready to be integrated. The design team shares very little knowledge/IP. Without a standard flow that checks compliance at various stages in the analog design flow, very little design IP is reused.

The analog designer decides which parameters should be followed, but in the final days before tape-out, there isn't time to rerun all of the analyses. Thus, it is up to the engineer to determine what subset of tests should be run.

From the designer's perspective, very little has changed in the tools to do his job. In very specific cases, new Spice simulators are performing 3, 5 and even 10 times faster than the designer's legacy tools. In general, however, their applicability is targeted and overall simulation time is not significantly reduced. In general, new tools to make designers more effective have not been widely available.

What should a new analog design flow look like?

How can a unified analog/mixed-signal design methodology help today's analog designers? First, they need a verification flow for analog/mixed-signal designs based on a GUI. In some cases, companies are taking on the responsibility of developing these verification flows themselves by compiling standard scripts to exhaustively test designs prior to tape-out. Since they are based on existing test bench techniques and simulation technologies, they are destined to fail because they will place an excessive delay in the tape-out schedule that can't be overcome.

Perhaps most importantly, this unified analog methodology has to leverage the experience of senior engineers to create effective, efficient test suites that can be used by anyone designing these blocks: i.e. capture the company's existing analog expertise so that it can be reused within a structured, more formal methodology. Such a new and unified analog methodology would have to recognize that in design mode, wide variations of sweeps and corners need to be run on the most effective simulators and targets different analysis types to the right engines automatically and inherently understands that in the final days before tape-out, a subset of analyses must be run before release to the foundry. Right now, the individual designer virtually controls this compliance step. We need the toolset to monitor and ensure that this happens.

In the last 18 months, the explosive growth of portable (and ever smarter) cellphones, GPS systems and multimedia devices has provided electronics suppliers with the potential for incredible growth.

Analog designers would benefit if the methodology improved simulator efficiency by generating more sophisticated stimuli, increasing the value of each simulation while decreasing the actual number of simulations required to test the variations on any part of the design. The analog designer would be able to analyze and view complex design and behavior problems if the new analog methodology incorporated a GUI.

Management capabilities
Of course, this analog design methodology has to include data management and managerial oversight/review capabilities. In particular, this unified analog methodology would manage all of the data in an organized manner with the ability to generate documentation supporting all the characteristics of the design's test environment.

Results and would allow engineering management to independently determine the right simulators and waveform viewers, and foundry processes to target for their designs. It should incorporate a powerful debugging environment for fully qualifying test benches and analyses before introducing the DUT. It should also include interfaces with the standard lab test equipment to analyze the behavior of the silicon to correlate the simulation results to the actual probed data and use that information to improve the standard compliance suite of tests.

Project design managers will need a mechanism to view the progress of any design by viewing the status of the analyses run and their pass/fail result. Those same project design managers will also want to be able to enable a design reuse methodology by quickly modifying existing specifications and running a nominal set of tests to verify the applicability of an existing design to be reused.

About the author
Nelson Seiden
is VP of marketing and business development at Knowlent Corp.

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