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Cadence identifies Asia's EDA growth factors

Posted: 18 Feb 2008 ?? ?Print Version ?Bookmark and Share

Keywords:EDA growth in Asia? low power design? EDA market growth?

Chu: While it may be difficult to calculate the exact growth rate for Asia Pacific, I believe it is growing faster than the worldwide average.

How is Asia's EDA industry faring? Lung Chu, Cadence Design Systems Asia Ltd's Asia Pacific president, shares the region's EDA growth information, bares his thoughts on the key places of development and discusses the company's efforts for low-power design.

Do you see tool purchase decisions still being taken in North America, or do the Asian engineers drive them?
For large multinationals such as Intel, IBM and TI, the decision is still at the headquarters. The smaller companies, like Trident, have an equal number of engineers in the remote site and the headquarters. In such companies, the remote site!the Asia Pacific!has more influence on, or power over, decision-making.

Overall, there is a growing influence from this region. Many of the designs in India and China are not low-end!they are not routine work. They are the complete design!from systems technology, architecture, implementation and all the way down. There is more of complete design being done, and they are responsible for the product line. Thus, the influence definitely has increased quite significantly. They still may not have the final decision power for purchases, but they have a lot of say in what they prefer. Of course, the pricing decision is handled by the headquarters, but the technical decision can now be influenced or even made in Asia Pacific.

In 2006, the EDA industry saw a revenue growth of about 15 percent. How about in 2007?
Cadence is definitely growing at the industry average or slightly higher; 2006 was a particularly good year for EDA with growth over 10 percent. In previous years, industry growth was below 10 percent. The 2006 results were due to budgets coming back from some companies.

Between 2002 and 2005, Cadence has grown on average about 10-12 percent annually, which is above the industry average during those years. In 2006, we grew at the same pace as the rest of the industry.

In Q2 07, we grew about 11 percent. In Q3 07, we grew a little over 9 percent, which is about the same rate as the industry's. While it may be difficult to calculate the exact growth rate for Asia Pacific as a region (excluding India), I believe it is growing faster than the worldwide average.

There are three primary reasons for Asia Pacific's growth. The No. 1 reason is that new local companies are emerging!fabless companies are growing bigger, and new ones are starting up. In China, there are many new startups with venture capitalists putting in money. In Taiwan, the fabless industry is still doing well, and the big ones such as MediaTek, Novatek and Sunplus are all growing. Korea doesn't have many small companies, but its Core Logic and MtekVision are doing quite well.

The second reason for growth is the multinationals' movement of design activity to Asia Pacific, especially to China and India. In China, there are many engineering graduates coming out of schools. With the engineering talent pool growing, the design activity will continue to increase.

The third key to growth is government funding. In particular, China has a five-year economic planning cycle. Its current plan, which has been running since 2006, focuses on innovation and high technology. In this area, semiconductor design has been identified as key for investment. Thus, we're seeing a lot of government investment in the IC design area.

Please tell us your outlook for the countries in Asia Pacific.
Note that I can't speak for India. I think China is definitely growing the fastest. Taiwan and Korea are still growing but at a slower pace. Taiwan is still the largest market in terms of revenue, and the growth isn't bad. In terms of design activity and revenue growth, however, China is growing much faster than Taiwan.

In 2006, the EDA market growth rate in China was about 15 percent. Local IC design output grew by about 50 percent in dollar terms reaching $2.3 billion. In contrast, Taiwan's local IC design industry grew by 13.5 percent, reaching $9.8 billion. However, we estimate that Taiwan's EDA market is only twice as big as China's.

Note that of China's $2.3 billion, many of the products!probably half!are low-end products like ID cards and smart cards, which place low demand on design expertise and EDA tools.

To what do you attribute these statistics?
I think the Taiwan companies are much more efficient in generating revenue from the design activity and investment they put in. Everything they tape-out gets designed in. Business-wise, they are doing much better.

Another thing is that there are many startups in China. During the startup stage, you are usually just investing. You don't have many tape-outs, and you don't have many design wins. In the future, however, you should see more revenue coming.

Also, note that there are more EDA tools used in China than what gets accounted for because of piracy. The actual design activity is bigger than what the EDA revenue shows. In the future, a lot more should come from China. A pessimistic view, however, is that there's a lot of activity but no real business.

Moving on from the markets, there are now two competing power-related design methodologies. How is the Common Power Format (CPF) performing?
There is consensus that low-power design is one of the hottest topics because of application needs. Traditionally, power has never been the primary factor in design!timing and functionality have been the two main parameters. Now, power is a factor that must be considered throughout the design process and all the way down to implementation.

Let's say you design an MP3 player chipset. That chipset is usually off when you are not listening to music. That means leakage power is not that important because it's usually shut off. Once it's on, all you are worried about is dynamic power. So in this case, dynamic power is more important. On the other hand, a handset is always on so you want to know about multiple supply voltages and things like that. The leakage power is more important.

The design application really becomes very important. From the system's standpoint, it's important so you can appropriately design the architecture. The EDA tools must consider those. The power intent must be embedded and consistent throughout the design flow.

We realized this, talked to a few customers!IDMs, foundries and the fabless industry!and then started the CPF effort. Now, 23 companies are officially in the Power Forward Initiative, including foundries like TSMC, UMC and SMIC; IDMs like AMD, Fujitsu, Freescale and NEC; and IP companies like ARM, Virage and Sequence. There's been a lot of support from the industry, and there have been quite a few successful design tape-outs.

I think the other standard is a response to the CPF. Due to some patent issues, CPF was not initially put in the public domain. We then submitted it to the IEEE to make it available to the industry. Unfortunately, there were two competing standards. From the design standpoint, there's no need to have two standards because both are really talking about the same thing.

So do you see these standards merging in the near future?
It's really not a technical issue. It's the business interest that dictates what's going to happen. What users really care about is having certain solutions that can solve their problem today. And there have been recent design successes with the CPF methodology, including those from companies like NXP.

- EE Times-Asia




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