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PICO Extreme platform touts TCAB technology

Posted: 19 Feb 2008 ?? ?Print Version ?Bookmark and Share

Keywords:algorithmic synthesis? application engines? accelerator blocks? TCAB?

Synfora Inc. has claimed a breakthrough in algorithmic synthesis technology. The company said its PICO Extreme platform automatically creates complex hardware sub-systems (application engines) from sequential untimed C algorithms. Tools based on the PICO platform allow designers to explore programmability, performance, power, area and clock frequency. PICO Extreme enables the implementation of larger and more complex sub-systems using a recursive system composition methodology based on Synfora's innovative tightly coupled accelerator blocks (TCAB) technology.

The technology is based on the recognition that when using C to describe hardware implementations, a C procedure is semantically equivalent to a Verilog module or a VHDL entity. Therefore both recursion and hierarchy can be used to increase the efficiency of designers and tools alike. Users are able to designate parts of their algorithm as custom building blocks.

These application-specific building blocks are C procedures that can be designed and verified standalone and then automatically integrated and scheduled as if they were primitive computing elements. In addition, TCABs can be composed of TCABs providing recursive composition of blocks to an arbitrary depth. This composition methodology improves the ability of the compiler to find better optimization, which improves performance and reduces area. With PICO Extreme, building hardware with pre-created blocks reduces the total runtime.

Along with the TCAB technology, PICO Extreme also delivers the following capabilities for reduced power and ease of integration into the SoC:

An advanced clock gating scheme that enables the designer to gate the clock of a complete processing function (loop nest) as a single entity halting any activity within the processing function (including the clock tree) and only requiring one clock gating cell.

The ability to extract and export mapping information that enables C-RTL equivalence checking tools to verify the equivalence between PICO-generated RTL and C. This information includes design latency/throughput, bit-accurate mapping of external C variables and stream functions to RTL block interfaces including scalar, stream and memory ports, and bit-accurate mapping of internal C variables to RTL wires, registers and memory objects.

An option to create OCP-IP compliant host interface to ease integration into the rest of the SoC.

PICO Extreme is available now. U.S. pricing starts at $350,000 for a one year time-based license.

- Gabe Moretti
EDA DesignLine




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