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JPEG2000 compression accelerator rolls

Posted: 14 Mar 2008 ?? ?Print Version ?Bookmark and Share

Keywords:JPEG2000 compression platform? 4G? digital imaging compression?

A unique JPEG2000 hardware compression platform has just been launched by the folks at 4DSP. Powered by Xilinx FPGA accelerators, the new system is said to promise better image compression to meet the needs of next generation digital cameras, 4G infrastructure and headsets. In addition, medical, military and other precision imaging applications will benefit from improved compression performance.

JPEG2000 is a wavelet-based digital imaging compression standard superseding the original discrete cosine transform-based JPEG compression method. 4DSP's JPEG2000 PMC daughter card is based on two ADV212 devices and a low-cost Spartan-3AN FPGA.

The JPEG2000 CODEC platform from 4DSP can grab and compress up to 140Mpixels/s from two independent cameras. It can either encode the video frames prior to or after applying an advanced video/imaging algorithm. Real-time pre- processing on raw data can be performed in the Virtex-4 or Virtex-5 FPGA devices. This flexibility can be used to correct effects such as local brightness or barrel distortion to enhance image quality and filter out elements that may reduce the compression effectiveness.

Technical information on the JPEG2000 daughter card is available online

- Clive Maxfield
Programmable Logic DesignLine

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