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Xilinx FPGAs debuts for high-radiation space apps

Posted: 09 Apr 2008 ?? ?Print Version ?Bookmark and Share

Keywords:radiation-tolerant FPGAs? Virtex-4? reconfigurable logic fabric? DSP?


I don't know why, but until recently I didn't really think of Xilinx FPGAs in the context of high-radiation environments such as space applications. Thus, it came as something of a surprise to learn that they claim over a 50 percent market segment share when it comes to Aerospace and Defense (A&D) applications.

In fact, the folks at Xilinx had their first MIL-STD-883 qualified device as early as 1989, since which time their components have been used in a wide variety of mega-cool projects. These include MARS Lander (JPL), MARS Rover (JPL), Venus Express (ESA), MRO HiRISE Camera (Ball), GRACE (NASA), FedSat (University of Southern Australia), OPTUS (Raytheon), TACSAT2 (NASA), CIBOLA (LANL), National Nuclear Security Administration plus around 50 additional programs underway.

But we digress... the point is that the folks at Xilinx have just announced the immediate availability of radiation-tolerant Xilinx Virtex-4QV FPGAs. The new Virtex-4QV family is said to be the first FPGA solution for space applications to offer multiple platforms optimized to meet the stringent high-performance processing needs of video, audio, radar streams and packet processing functions. Xilinx will be showcasing the new devices at the SEE Symposium, April 15-17.

In addition to their high-performance reconfigurable logic fabric and abundant built-in memory, Virtex-4QV FPGAs incorporate advanced embedded computing and DSP technology in a single chip. This enables designers of spaced-based digital electronics to reduce system size, weight, and power consumption while accelerating development and eliminating the risk and NREs associated with ASICs.

Today's announcement extends Xilinx's ability to satisfy the requirements of the aerospace market by offering what they claim is the only FPGA family that meets QML class-V requirements for use in high-performance space applications such as packet and video processing. Xilinx also says that the introduction of the Virtex-4QV family means that designers of high-altitude, in-orbit, space-based or extra-terrestrial systems in hostile radiation environments can now obtain unprecedented levels of integration in a reprogrammable FPGA that has the logic capacity, performance, and advanced silicon features that previously were available only to commercial product developers.

Single-chip solution
Building on the legacy of Virtex FPGAs, the QPro Virtex space-grade series are the broadest offering of FPGAs for space applications available today. With the launch of its commercial-grade Virtex-4 family, Xilinx introduced the concept of domain-optimized FPGA platforms, which today includes Virtex-4 LX FPGAs for logic-intensive designs, Virtex-4 SX FPGAs for ultra high-performance signal processing, and Virtex-4 FX FPGAs for embedded and packet processing.

To meet the unique processing requirements of space-based systems, Xilinx selected four of the highest-performance, largest-capacity devices across the three Virtex-4 platforms for its new Virtex-4QV family. These devices provide what is claimed to be an unprecedented level of system integration among FPGA-based offerings for space applications with up to 200,000 logic cells, 10Mbit of RAM/FIFO, two built-in PowerPC processor blocks with auxiliary processing unit (APU) controller, 512 DSP slices and four built-in Ethernet MAC blocks.

All Virtex-4QV FPGAs are guaranteed for radiation tolerance. Extensive testing by Xilinx and the Single Event Effects (SEE) Consortium verifies a total ionizing dose (TID) of 300 krad (Si) and single-event latchup (SEL) immunity greater than 125MeVcm2/mg with Virtex-4QVdevices. (The SEE Consortium was founded in 2002 when Xilinx joined forces with NASA's Jet Propulsion Laboratory at the California Institute of Technology, leading the way to the application of SRAM-based reconfigurable FPGA technology in high-radiation environments.)

Xilinx TMRTool
The Virtex-4QV family is supported with a range of upset mitigation solutions to address environmental circumstances, such as charged particles (e.g., heavy ions or protons), that can alter the state of configuration elements within the FPGA, causing a single event upset (SEU) that produces adverse effects on the expected FPGA functionality.

These solutions include triple modular redundancy (TMR) reference designs, extensive application notes that simplify the implementation of advanced configuration memory scrubbing techniques, and the Xilinx TMRTool to automate logic triplication in the FPGA fabric. The TMRTool increases productivity with fast, error-free design triplication; it also streamlines the integration of custom-built TMR modules while giving designers control over how the design is triplicated.

To help accelerate every phase of system design with Virtex-4QV FPGAs, Xilinx offers a comprehensive development ecosystem that includes: ISE FPGA design software; Embedded Development Kit with Platform Studio suite; the XtremeDSP tools package with System Generator for DSP and AccelDSP synthesis tool; and the ChipScope analyzer.

It also features a robust library of more than 600 intellectual property cores, Xilinx training and support services, and application notes that can be downloaded from the Xilinx Website.

The Virtex-4QV family is now shipping with the XQR4VLX200, XQR4VSX55, and XQR4VFX60 devices available for order today in a variety of package options. The XQR4VFX140 device will be available for order in the third quarter of 2008. Details on pricing and delivery are available through Xilinx sales representatives.

- Clive Maxfield
Programmable Logic DesignLine

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