Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

ANSI-C to VHDL compiler tailored for FPGA designs

Posted: 09 Apr 2008 ?? ?Print Version ?Bookmark and Share

Keywords:Ylichron? HCE compiler? FPGA? ANSI-C VHDL?

Ylichron S.r.l. is a spin-off company from ENEA (the Italian Agency for New Technologies, Energy and Environment). During the Multi-core Reconfigurable Supercomputing Conference held in Belfast (April 1-3), Paolo Palazzari, the Ylichron CTO for software activities, announced the availability of what he claims to be the first true ANSI-C to VHDL compiler targeting the FPGA market.

This compiling tool, called HCE (HARWEST Compiling Environment), is the outcome of a four-year industrial research project (HARWEST) funded by the Italian ministry for university and research (MUR) in the context of a program purposely launched for stimulating the growth of spin-offs from public institutions.

HCE allows the design of very efficient parallel computing systems, described in VHDL-RTL, starting from algorithm specifics captured in the ANSI-C language. HCE leverages the Microsoft VisualStudio compiling platform, which allows users to access the classical facilities of an advanced IDE (i.e. code editing, debugging with breakpoints, dynamic code and memory inspection and editing, etc.); the extension to the Linux platform is currently under development.

HCE is said to allow customers with demanding computing applications to easily access and use the power and flexibility of FPGA computing. Furthermore, HCE is claimed to shorten significantly the development time of custom products, avoiding the very error-prone and time-consuming process of low-level hardware design and debug.

- Clive Maxfield
Programmable LogicDesignLine

Article Comments - ANSI-C to VHDL compiler tailored for...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top