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Synopsys touts first certified USB 2.0 PHY IP for 45nm

Posted: 22 Apr 2008 ?? ?Print Version ?Bookmark and Share

Keywords:45nm? IP? USB 2.0?

Synopsys Inc. has announced that its DesignWare USB 2.0 nanoPHY is the first 45nm USB 2.0 PHY intellectual property (IP) to successfully pass the USB Implementers Forum Hi-Speed USB PHY certification. According to Synopsys, its USB 2.0 nanoPHY mixed-signal IP uses half the power and die area compared to previous USB PHY IP solutions and enables faster time-to-market with reduced risk.

The company offers the DesignWare USB 2.0 nanoPHY IP for a broad range of high-volume, mobile and consumer applications where the key requirements include minimal area and low power consumption. According to Synopsys, the IP addresses key requirements by implementing an architecture that provides a highly effective combination of small area, low power consumption and minimal leakage. In addition, the DesignWare USB 2.0 nanoPHY IP has unique built-in tuning circuits that enable quick, post-silicon adjustments to account for unexpected chip/board parasitics or process variations without the need to modify the existing design. This feature, says Synopsys, allows designers to increase yield and minimize the cost of expensive silicon re-spins.

The logo-certified DesignWare USB 2.0 nanoPHY IP for the 45nm process is available now. In addition, the USB 2.0 nanoPHY for the 40nm process is currently scheduled will be ready by 2H 08.





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