Agilent upgrades RFIC simulation software
Keywords:RFIC? simulation software? EDA?
"RFIC designers have limited simulation coverage todaysimulating a fraction of what they need to before the tape-out deadline," said Marc Petersen, product marketing manager with Agilent's EEsof EDA division. "They are missing design problems and incurring costly re-spins. GoldenGate 4.2 enables more simulation coverage with increased speed and capacity, and takes advantage of new ways to uncover RF/mixed-signal problems early in the design cycle."
In RFIC design, transient (Spice) simulations provide time-domain results. GoldenGate 4.2 features improvements to transient simulations, achieving faster speeds of 2x to 4x on single-core computers and typically 5x for quad-core computers. The transient improvements also help speed up the frequency-domain simulation process. Faster simulations allow for more extensive use of statistical design throughout the RFIC design cycle, without compromising tight development schedules.
Digital State Sweeping (DSS), a new GoldenGate 4.2 feature, provides an automated solution to the problem of sweeping an RF design through its many digital control states. Performing the sweep manually is a tedious simulation task. DSS automates operational verification of the control states and provides interface and connectivity testing as well as digital-RF connectivity debugging, allowing digital and RF teams to work concurrently.
Agilent's GoldenGate software is an advanced simulation and analysis solution for integrated RFIC design. Its simulation algorithms are optimized for the challenging demands of today's complex RFIC design, enabling full characterization of complete transceivers prior to tape-out. To ensure device manufacturability and reduce design spins, GoldenGate takes advantage of both frequency-domain and time-domain simulation capabilities to perform necessary analyses on today's mixed-signal RFICs.
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