Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Manufacturing/Packaging
?
?
Manufacturing/Packaging??

Fujitsu reports advance in 'soft error' estimation

Posted: 05 May 2008 ?? ?Print Version ?Bookmark and Share

Keywords:cosmic ray? soft error estimation? Fijitsu research?

Researchers at Fujitsu Laboratories Ltd in Japan are claiming a major advance on improving the reliability of semiconductors with a technique for quick and accurate measurement of the "soft errors" that could be caused to a chip by the effect of neutrons from some cosmic rays.

The scientists worked with colleagues at the Hawaii Observatory of the National Astronomical Observatory of Japan, an inter-university research institute that is part of Japan's National Institute of Natural Sciences.

The method developed enables quick and accurate determination of the rate at which soft errors in a chip are encountered, a rate that varies depending on such characteristics as the geometric latitude and altitude of the location, and the shield effect of buildings where the chips are deployed.

Details of the advance were presented at last week's International Reliability Physics Symposium (IRPS).

If a cosmic ray collides with an oxygen, carbon or nitrogen atom, it can release a neutron from the atom's nucleus. If that neutron then goes on to collide with a silicon atom, it can split the atom's nucleus into smaller, charged particles. And if the silicon atom is in a semiconductor memory, the charged particles can be sufficient to change the contents of a memory cell, producing such "soft errors."

To combat these errors, engineers can add error-correction codes or choose materials that are less susceptible to the radiation. However, doing so for every chip will increase prices so engineers work on simulations of the number of soft errors a given chip might experience to see where best to invest their efforts. Getting accurate data for the simulations is difficult because the errors are so rare and are also influenced by the specific conditions of the physical location where the chips will be used.

Both the soft-error rate and the intensity of neutrons were measured by the Fujitsu team so that the relationship between the two could be assessed. By taking measurements inside and outside the telescope it was also possible to deduce the effect of the building on shielding chips from cosmic rays. Fujitsu also took measurements in Tokyo to provide a comparison with the level of cosmic rays seen near sea level.

By comparing measurements taken in Tokyo and at the top of Mauna Kea, the top of a dormant volcano where the observatory is located, the researchers found the intensity of neutrons at the observatory to be 16 times the level in Tokyo. When the impact of building composition was also factored in, it was 7.4 times greater.

The researchers also stressed that by doing the work on Mauna Kea, they were to gather the data in one-eighth the time it would have taken in Tokyo.

Fujitsu said it is already applying the results of the work to assess soft error rates in chips made at different geometries , including 65nm, 45nm and 32nm devices, and thus incorporate appropriate soft error countermeasures, such as determining whether such countermeasures are necessary and which materials and circuit types to use.

- John Walko
EE Times Europe





Article Comments - Fujitsu reports advance in 'soft err...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top