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Single-chip synchronous clock boosts SDH, SONET, Ethernet

Posted: 06 May 2008 ?? ?Print Version ?Bookmark and Share

Keywords:Ethernet? SDH SONET clock? STC5270 synchronous?

Connor-Winfield Corp. has introduced the STC5270, an integrated single-chip solution for the synchronous clock in SDH, SONET, and synchronous Ethernet network elements. The device is fully compliant with ITU-G.813 and Telcordia GR1244 and GR253.

The STC5270 accepts two reference inputs and generates two independent synchronized output clocks. Reference input frequencies are automatically detected. All reference switches are hitless. Synchronized outputs may be programmed for a variety of SONET, SDH and synchronous Ethernet frequencies.

The clock generator includes a digital phase-locked loop (DPLL), which may operate in freerun, synchronized, and holdover modes. A standard SPI bus provides access to the STC5270's internal control and status registers. The device operates with an external 20MHz OCXO or TCXO as its MCLK.

Other features include better than 0.1ppb hold-over accuracy, programmable loop bandwidth from 0.1-103Hz, and IEEE 1140.1 JTAG boundary scan. The device is available in a TQ100 package.

- Gina Roos
eeProductCenter





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