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Stratix III FPGAs support SGMII on LVDS I/Os

Posted: 13 May 2008 ?? ?Print Version ?Bookmark and Share

Keywords:Stratix III FPGAs? Gigabit Ethernet SGMII? LVDS I/Os?

Altera Corp. has rolled out its Stratix III FPGAs support Serial Gigabit Media Independent Interface (SGMII) on its LVDS I/Os. Offering interface speeds of 1.25Gbit/s and meeting SGMII's stringent jitter performance requirements, Stratix III LVDS I/Os support triple-speed Ethernet (10/100/1,000Mbit/s) interfaces without transceivers. Stratix III FPGAs are the industry's first programmable logic devices able to support Gigabit Ethernet SGMII on LVDS pins, offering lower costs, lower power and more interfaces per device.

The SGMII I/Os featured in Stratix III FPGAs allow the device to connect to Gigabit Ethernet ports through small form-factor pluggable (SFP) optical modules. Using Stratix III FPGA's LVDS channels, customers can integrate a large number of GbE channels in high-port-count applications, such as 96-port SGMII switches.

"Stratix III FPGAs were designed to deliver tremendous value to customers with an unmatched combination of low power, high performance and high density," said David Greenfield, senior director of product marketing, high-end products at Altera. "The high data rate speeds and low jitter performance offered by Stratix III FPGA's LVDS I/Os provide wireline applications a cost-effective SGMII GbE interface."

Stratix III FPGA LVDS channels support Gigabit Ethernet SGMII as a result of the architecture's low jitter performance, dynamic phase aligner (DPA) and soft clock-data recovery (CDR) mode. Soft-CDR, which is implemented in the programmable fabric as IP, supports SGMII by extracting the clock out of the clock-embedded data.

Altera's Stratix III FPGAs, offering Gigabit Ethernet SGMII connectivity on its LVDS I/Os, are available.

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