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AD9779A/AD9788: guaranteeing PLL lock over temperature

Posted: 26 May 2008 ?? ?Print Version ?Bookmark and Share

Keywords:AD9779A application note? AD9788 clock IC? PLL lock?

The AD9779A and AD9788 TxDAC families from Analog Devices implement an internal wideband clock multiplier solution with very low phase noise. The low phase noise is accomplished in part by switching optimal reactive elements into the VCO of the clock multiplier. The operating frequency of the VCO is broken up into 63 bands, where the value of the reactive components is optimized for each band. The lock ranges of each band shift over temperature. The center frequency of each band increases as the temperature decreases and the center frequency decreases as the temperatures increases. For any given input frequency, there are two to four optimal bands. An optimal band is one that stays in lock over the entire temperature range, -40C to 85C. The optimal bands may not be the same for every part due to process variations. Picking one band for the lifetime of the part does not work. Therefore, a PLL automatic band select feature is included in this part. When the PLL automatic band select mode (PLL auto mode) is enabled, the auto mode finds a band whose control voltage is at the center of the whole range at the current temperature point. Once the PLL auto mode concludes, this band, which is optimal for the current temperature, can be read back via the SPI.

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