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Build video surveillance products with DaVinci processors

Posted: 03 Jun 2008 ?? ?Print Version ?Bookmark and Share

Keywords:video surveillance? DSP? DaVinci processor?

By Oliver Zhang, Yong Hua Jia and Yua Fu Zhao
Hikvision Digital Technology Co. Ltd

In the rapidly expanding video surveillance space, customers are demanding higher resolution, more channels and computationally hungry analyticsall at lower cost and power. This article will explain how Hikvision built video surveillance products using Texas Instruments' DaVinci processors.

Hardware selection
In previous generation products, we used a TMS320C6000 DSP from TI paired with an ARM processor. This combination served those products well, but more performance was needed to meet customer demand for more channels and improved image quality.

Many factors were evaluated when choosing a platform for next generation products, such as performance, power consumption, cost and ease of development. ASIC-based solutions offered high performance with the lowest power consumption and per unit cost. However, ASICs presented several problems. One is their (increasingly) high development cost in time and money. To recoup design costs requires prohibitively high volumes. Another problem with ASICs is the lack of flexibility. With their long design cycles, ASICs aren't able to respond effectively to rapidly shifting customer needs.

While FPGAs and massively-parallel processors offer the needed programmability and additional video channels, these devices have their own drawbacks in that these devices can be difficult to program. What was needed was an easy, programmable solution that offered more performance while maintaining low power consumption and a straightforward programming model at a low cost.

Choosing another TI processor was attractive for several reasonsthe most obvious being code reuse. Hikvision has invested considerable resources implementing highly optimized codecs on the TMS320C64x DSPs. Since TI's next-generation DSPs are code compatible with the C64x devices, porting existing code could be done with minimal effort. Another motivation was tools. Hikvision engineers were familiar with TI's Code Composer Studio, which offers a tested development environment and an extensive set of features. And most importantly, TI's roadmap offered a promising way forward with its DaVinci family of digital media processors.

DaVinci promise
TI's DaVinci portfolio includes fourteen digital media processors based on TI's high-performance TMS320C64x+ DSP core. The family's flagship devices (see Figure 1), pair a C64x+ DSP core with an ARM9 and a Video Processing Subsystem (VPSS), a host of hardware accelerators for common video processing tasks. Four of the DaVinci members feature this basic configuration. Nine of the DaVinci parts omit the ARM core, featuring just the C64x+ core and VPSS.

Figure 1: High level diagram of TI's TSM320DM644x

The DaVinci devices were a good fit because they strike a balance between ASICs and programmable DSPs. By offering fixed function (although configurable) accelerators in the VPSS for common video processing tasks such as encoding, decoding and display, the DaVinci devices are able to offer ASIC-like cost and power for the heavy lifting involved in surveillance applications. By offering a high-performance programmable DSP, DaVinci allows designers the flexibility to quickly implement new features like content analyticsa topic we will come back to later in this article.

Because of the wide range of options in the DaVinci family we were able to use DaVinci devices across all product lines (DVR, DVS and IP modules). This enabled a build once, deploy many strategy that greatly lowers engineering development and system cost. Additionally, by integrating the ARM core and hardware accelerators on a single die, the DaVinci parts offered increased performance at a lower cost and power consumption. This higher integration was particularly important in enabling cost and power sensitive products such as the surveillance IP module.

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